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       A S I A N   I B I S   S U M M I T    I N F O R M A T I O N

Time/Date:  8:00 - 16:30, Friday November 12, 2010

Location:   Sherwood Hotel
            111 Min Sheng E Road
            Sec.3, Taipei, Taiwan

Rooms:      Ballrooms I and II  (Look for signs)

Sponsors:   Agilent Technologies
            Avant Technology (IO Methodology)
            Foxconn Technology Group
            ICT-Lanto
            Intel Corporation
            Sigrity
            Synopsys

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          I B I S  S U M M I T  M E E T I N G  A G E N D A

8:15    REFRESHMENTS & SIGN IN
        - Vendor Tables Open at 8:30

9:00    Welcome
          - Sogo Hsu
            (Foxconn Technology Group)
          - Michael Mirmak
            (Chair IBIS Open Forum, Intel Corporation)

9:20    Introducing IBIS
          Michael Mirmak (Intel Corporation)

9:35    Point Reduction Method for IBIS Curves
          Lance Wang (IO Methodology)

10:05   BREAK (Refreshments and Vendor Tables)

10:25   IBIS for SSO Analysis
          Haisan Wang, Joshua Luo, Jack Lin, and Zhangmin Zhong
          (Sigrity)

11:05   Correlating C_pin Capacitance with Measurements
          Randy Wolff (Micron Technology)

11:30   Enforced Passivity of S-parameter Sampled Frequency Data
          Wenliang Tseng, Sogo Hsu, Frank Y.C. Pai, and
          Scott C.S. Li (Foxconn Technology Group)

12:00   FREE BUFFET LUNCH (Hosted by Sponsors)
          - Vendor Tables

13:30   Automated AMI Model Generation & Validaton
          Jose Luis Pino*, Amolak Badesha*, Manuel Luschas**,
          Antonis Orphanou**, and Halil Civit**
          (*Agilent Technologies and **NetLogic Microsystems)

14:10   Extending/Leveraging IBIS Constructs to Model High-Speed
        I/Os and Packages using AMI, Spice, and S-Parameters
          (John Lin*, Feras Al-Hawari**, Taranjit Kukal**, and
          Ambrish Varma**, *Flextronic and **Cadence Design Systems)

14:40   BREAK (Refreshments and Vendor Tables)

15:00   IBIS-ISS: What Is It and What It Means to You
          Michael Mirmak (Intel Corporation)

15:30   Model Connection Protocol Extensions for Mixed Signal SiP
          Taranjit Kukal*, WenLiang Dai*, Brad Brim**, and
          Eiji Fujine*** (*Cadence Design Systems, **Sigrity,
          and ***Fujitsu VLSI Limited)

16:00   Concluding Items

16:30   END OF IBIS SUMMIT MEETING

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