CONTENT OF THE ASIAN IBIS OPEN FORUM SUMMIT MEETING November 9, 2012 Shanghai, China .zip Compressed .ppt, .pps Power Point .doc Word .ps Postscript .pdf Acrobat .txt Text .jpg Pictures ADMINISTRATIVE DOCUMENTS: 00readme.txt This Document a110912.txt Agenda m110912.pdf Minutes announcement_chinese.pdf Announcement, Traditional Chinese CONFERENCE RECORD: cover.pdf Cover Page booklet.pdf Conference booklet of presentations cover.pptx Original Files for editing cover_poster.pptx PRESENTATIONS AND ACTUAL TITLES (IN ACTUAL ORDER OF PRESENTATION): mirmak.pdf IBIS 5.1: An Overview Mirmak, Michael (Intel Corporation, USA) [Presented by Wang, Lance (IO Methodology, USA)] liu_p.pdf Using Latency Insertion Method to Handle IBIS Models Liu, Ping*#; Tan, Jilin*##; and Schutt-Aine, Jose** (*Cadence Design Systems, #China, ##USA; and **University of Illinois, USA) [Presented by Liu, Ping] liu_j.pdf Channel Simulation Platform Creation in Matlab and IBIS-AMI Simulation Verification Liu, Jason*; Xue, Harrison*; and Yan, Benny** (*Celestica and **Cadence Design Systems, China) [Presented by Liu, Jason] huang.pdf Effect Analysis of IL Resonance between 0.5~1 Normalized Frequency Bandwidth Huang, ChunXiang; Dong, XianQing; and Yu, Lan (Huawei Technologies, China) [Presented by Huang, ChunXiang] liu_jt.pdf Efficient End-to-end Simulations of 25G Optical Links Liu, Jing-Tao*#; Rao, Fangyi*##; Gupta, Sanjeev**; and Badesha, Amolak** (*Agilent Technologies, #China, ##USA; and **Avago Technologies, USA) [Presented by Liu, Jing-Tao] sun.pdf Analysis of the Impact of Crosstalk in High-Speed Serial Links Sun, AnBing; Yin, ChangGang; and Jia, Wei (ZTE Corporation, China) [Presented by Sun, AnBing] dong.pdf Verification of ICN Usability in Characterizing System Crosstalk Dong, XiaoQing; and Huang, ChunXiang (Huawei Technologies, China) [Presented by Dong, XiaoQing] lin.pdf Chip PDN Model for Power Aware Signal Integrity Analysis Lin, Jack W.C.#; and Chen, Raymond Y.## (Cadence Design Systems, #China, ##USA) [Presented by Wang, Haisan (Cadence Design Systems, China)] ross.pdf IBIS Parser Update Ross, Bob (Teraspeed Consulting Group, USA) [Presented by Ekholm, Anders (Ericsson, Sweden)] wang.pdf IBIS Validation Method Review Wang, Lance (IO Methodology, USA) pytel.pdf The Evolution of DDR Memory and Overcoming Challenges of DDR3/4 Design Pytel, Steve (ANSYS, USA) [Presented by Li, BaLong (ANSYS, China)] kukal.pdf Designing DDR3 System Using Static Timing Analysis in Conjunction with IBIS Simulations Kukal, Taranjit#; Zhong, ZhangMin##; and Dudek, Heiko### (Cadence Design Systems, #India, ##China, ###Germany) [Presented by Zhong, ZhangMin]