FILE: a110912.txt TITLE: Agenda TYPE: .txt AUTHORLAST: AUTHORFIRST: COMPANY: IBIS Open Forum DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: m110912.pdf TITLE: Minutes TYPE: .pdf AUTHORLAST: AUTHORFIRST: COMPANY: IBIS Open Forum DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: mirmak.pdf TITLE: IBIS 5.1 - An Overview TYPE: .pdf AUTHORFIRST: Michael AUTHORLAST: Mirmak COMPANY: Intel Corporation DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: ross.pdf TITLE: IBIS Parser Update TYPE: .pdf AUTHORFIRST: Bob AUTHORLAST: Ross COMPANY: Teraspeed Consulting Group DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: wang.pdf TITLE: IBIS Model Validation Review TYPE: .pdf AUTHORFIRST: Lance AUTHORLAST: Wang COMPANY: IO Methodology DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: dong.pdf TITLE: Verification of ICN Usability in Characterizing System Crosstalk TYPE: .pdf AUTHORLAST: Dong and Chunxing Huang AUTHORFIRST: Xiaoqing COMPANY: Huawei DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: lin.pdf TITLE: Chip PDN Model for Power Aware Signal Integrity Analysis TYPE: .pdf AUTHORLAST: W.C. Lin, Raymond Y. Chen and Haisan Wang AUTHORFIRST: Jack COMPANY: Cadence Design Systems DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: huang.pdf TITLE: Effect Analysis of IL Resonance between 0.5~1 Normalized Frequency Bandwidth TYPE: .pdf AUTHORLAST: Huang, Gong Xiaoqing and Yu Lan AUTHORFIRST: Chunxing COMPANY: Huawei DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: kukal.pdf TITLE: Designing DDR3 system using Static Timing Analysis in Conjunction with IBIS simulations TYPE: .pdf AUTHORLAST: Kukal, Zhangmin Zhong, Heiko Dudek AUTHORFIRST: Taranjit COMPANY: Cadence Design Systems DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: sun.pdf TITLE: Analysis of the Impact of Crosstalk in High-speed Serial Links TYPE: .pdf AUTHORLAST: Sun, Changgang Yin and Wei Jia AUTHORFIRST: Anbing COMPANY: ZTE DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: pytel.pdf TITLE: The Evolution of DDR Memory and Overcoming Challenges of DDR3/4 Design TYPE: .pdf AUTHORLAST: Pytel AUTHORFIRST: Steve COMPANY: ANSYS DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: liu_j.pdf TITLE: Channel Simulation Platform Creation in Matlab and IBIS-AMI Simulation Verification TYPE: .pdf AUTHORLAST: Liu*, Harrison Xue* and Benny Yan** AUTHORFIRST: Jason COMPANY: Celestica* and Cadence Design Systems** DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: liu_jt.pdf TITLE: Efficient End-to-end Simulations of 25G Optical Links TYPE: .pdf AUTHORLAST: Liu*, Fangyi Rao*, Sanjeev Gupta** and Amolak Badesha** AUTHORFIRST: Jing-Tao COMPANY: Agilent Technologies* and Avago Technologies** DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China FILE: liu_p.pdf TITLE: Using Latency Insertion Method to Handle IBIS models TYPE: .pdf AUTHORLAST: Liu*, Jilin Tan* and Jose E. Schutt-Aine** AUTHORFIRST: Ping COMPANY: Cadence Design Systems* and University of Illinois at Urbana-Champaign** DATE: Nov 09 2012 LOCATION: Shanghai, P.R. China