DATE: 10/29/03 SUBJECT: OCTOBER 21, 2003 EIA IBIS Summit Meeting Minutes VOTING MEMBERS AND 2003 PARTICIPANTS LIST: Ansoft Corporation (Eric Bracken) Apple Computer Kim Helliwell Applied Simulation Technology Fred Balistreri Cadence Design Lynne Green*, Lance Wang* Cisco Systems Syed Huq, Michael LaBonte*, Val Mandruson, Hung Pham, Todd Westerhoff Fairchild Semiconductor (Graham Connolly) Hitachi ULSI Systems Kazuyoshi Shoji* Huawei Technologies (Jiang Xiang Zhong) Intel Corporation Stephen Peters, Michael Mirmak*, Arpad Muranyi*, Eric Magnusson LSI Logic Frank Gasparik Matsushita (Panasonic) Atsuji Ito Mentor Graphics [Bob Ross], Ian Dodd*, Guy de Burgh, John Angulo*, Mike Donnelly, Weston Beal Micron Technology Randy Wolff Molex Incorporated Gus Panella Motorola (Rick Kingen) National Semiconductor [Milt Schwartz], [Tim Coyle] NEC Electric Corporation (Itsuki Yamada) North East Systems Associates Edward Sayre*, Kathy Breda*, Michael Baxter* Philips Semiconductor (D.C. Sessions), Stephanie Goedecke Siemens (& Automotive) AG Eckhard Lenski*, Michael Kindij, Burkhard Muller, Katja Koller, Andre Goerisch, Manfred Maurer, Bernard Unger, Amir Motamedi, Hartmut Ibowski, Gerald Bannert Signal Integrity Software Bob Haller*, Barry Katz, Doug Burns Sigrity [Raj Raghuram] Sun Microsystems Tim Coyle* Synopsys Warren Wong, Edmund Cheng Texas Instruments Thomas Fisher* Teraspeed Scott McMorrow, Tom Dagostino, Kevin Simpson, Bob Ross* Time Domain Analysis Systems Dima Smolyansky, Steve Corey Zuken (& Incases) Michael Schaeder, Ralf Bruening OTHER PARTICIPANTS IN 2003: Agilent Technologies Herbert Lage Brocade Frank Yuan, Yongrue Yu Conexant Gary Felker EADS CCR Alix de la Villeguerin EFM Ekkehard Miersch EMC Corporation Brian Arsenault, John Fernandez, Simba Julian Fraunhofer IZM Ege Engin Fujitsu Tadashi Arai GEIA (Chris Denham) Independent Luca Giacotto, Kelly Green, Shinichi Maeda* Infineon Tech AG Christian Sporrer Marvell Semiconductor Itzik Peleg NetLogic Microsystems Eric Hsu North Carolina State Univ. Ambrish Varma* Plexus Joseph Socha Politechnico de Torino Igor Stievano Qlogic Larry Barnes Sintecs BV Hans Klos, Bob te Nijenhuis SiQual (Rob Hinz) Via Technologies (Weber Chuang) Xilinx Susan Wu In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Telephone Number Bridge # Passcode November 14, 2003 1-916-356-2663 1 477-8778 All meetings are 8:00 AM to 9:55 AM Pacific Time. Meeting agendas are typically distributed seven days before each Open Forum. Minutes are typically distributed within seven days of the corresponding meeting. When calling into the meeting, provide the bridge number and passcode at the automated prompts. If asked by an operator, please request to join the IBIS Open Forum hosted by Michael Mirmak. For international dial-in numbers, please contact Michael Mirmak. NOTE: "AR" = Action Required. -------------------------------- MINUTES ----------------------------------- INTRODUCTIONS AND MEETING QUORUM The IBIS Summit Meeting was held in Westford, Massachusetts at the offices of North East Systems Associates (NESA) in conjunction with the PCB East Conference. The summit was co-sponsored by IBIS and NESA. 18 people representing 12 organizations attended, including 7 people who attended via teleconference. The notes below capture some of the content and discussions. The meeting presentations and other documents are uploaded at: http://www.eda.org/pub/ibis/summits/oct03/ Michael Mirmak opened the meeting and asked everyone in the room and on the teleconference bridge to introduce themselves. The group was well-attended by semiconductor vendors and model providers, EDA tool vendors and users of IBIS models. Michael thanked Kathy Breda and Ed Sayre of North East Systems Associates for their logistical support on-site and Lynne Green for her assistance with calls for papers and setting the agenda. Finally, Michael thanked the presenters and participants for attending. Ed Sayre, CEO of North East Systems Associates, welcomed the participants and expressed his hope that the summit would be a productive and useful experience. Michael asked if there were any new issues or discussion items to add to the agenda. No issues were raised. PRESENTATIONS AND DISCUSSION TOPICS The rest of the meeting consisted of presentations and discussions. These notes capture some of the content and discussion. More details are available in the documents uploaded to the location noted above. IBIS CHAIR'S REPORT Michael Mirmak, Intel Corporation Michael reviewed the recent work of the IBIS Open Forum and IBIS community at large. The Open Forum continues to be strong, with 28 paid members and nine purchasers of Golden Parser (IBISCHK) licenses. In addition, specification development activities are on-going, with the approval of the IBIS Interconnect Modeling Specification (ICM) 1.0 and the first formal "readings" of the IBIS 4.1 specification about to begin. The IBIS Quality Committee continues to provide feedback on models and modeling issues, and a new IBISCHK4 parser is expected to pass beta testing before the end of the year. While IBIS Open Forum work has been successful, many challenges remain ahead for IBIS as a whole. In order to better support IBIS tool vendors, model makers, and users, cookbooks for both ICM and IBIS 4.0 must be completed and distributed as soon as possible. In addition, the Open Forum must continue to expand and enhance a global IBIS community; support of the European DATE summit must continue, but the Open Forum should also consider holding "Electronic Roadshow" presentations in time zones convenient to Europe and Asia. This would help bring summit-quality presentations to other parts of the globe while not incurring the costs associated with international travel. Ed Sayre suggested that more IBIS technical materials be made available to universities and university students, at perhaps a junior or senior level. This would enhance interest in behavioral modeling and promote IBIS as a whole new way of looking at semiconductors. Mike LaBonte also suggested that IBIS member company Synopsys be encouraged to present at future summits on its HSPICE*-related IBIS support. IBIS QUALITY COMMITTEE UPDATE Bob Haller, Signal Integrity Software (SiSoft) Bob reviewed the purpose of the Quality Committee and summarized the backgrounds of the various participants. He then listed the various "problem areas" of IBIS, where accuracy has become difficult due to misinterpretations or limitations of the IBIS specification; these include C_comp, on-die termination and matching between I-V and V-t curves. On-die termination prompted some discussion. While Bob noted that IBIS was not necessarily intended to include these termination effects, he suggested that sweeping I-V curves over the entire operating range of the part is sufficient to ensure these effects' inclusion. Ed Sayre noted that, as memory chips are the highest volume component in production today, user configurability of termination, strength and slew rate are serious issues. On overclocking, Bob suggested that cutting out "excessive dead time" in V-t curves helps to ensure the usability of IBIS models at higher frequencies. However, he also suggested that an explicit maximum frequency limit may be needed. Ed Sayre observed that, in general, manufacturers might not always be the best source for accurate modeling information, as IBIS is treated more as a "marketing feature" than a technical requirement. On accuracy checking, Michael Mirmak suggested that a parser specification, including the parser's assumptions and outside of the actual IBIS specification, should be written to inform the IBIS community of how the specification is being interpreted. Bob reviewed the current Quality Committee model quality rating levels and solicited feedback on Committee documents. Accuracy questions are encouraged, as are more participant papers on accuracy issues. Bob concluded his presentation by noting that the next Quality Committee meeting will be held on Tuesday, November 9. He observed that the meeting had good European and Japanese participation and he hoped this would continue. For additional information on the quality committee and to be included on the mailing list send mail to ibis-quality@freelist.org. The IBIS quality committee web site is available on the IBIS web page or at http://www.sisoft.com/ibis-quality IBIS USER EXPERIENCES Timothy Coyle, Sun Microsystems Timothy reviewed the current state of IBIS from a model maker's and model user's perspective. At present, IBIS 3.2 is familiar and firmly entrenched in the industry. While the concepts are familiar, most models represent extremes of very good or very poor quality, even among those which pass the Golden Parser. Poor accuracy and quality for model data is not detected by the parser in most cases; in addition, many manufacturers treat generation of IBIS data as a marketing effort or as an adjunct to design rather than as a separate step performed by a specific expert. Timothy summarized his recommended procedure for verifying outside model accuracy: - determine your vendors' IBIS generation procedures - request tester or other verification data - ask about their trust in their modeling data (would they fail a system design based on their modeling data?) As an adjunct activity to promote greater accuracy and information exchange, Timothy has created a separate web site for IBIS developers, to be announced in several weeks. The purpose of the web site will be to provide information exchange in answer to the frequent questions of speed and accuracy asked in relation to IBIS versus transistor-level modeling tools. Comments and suggestions for the site may be provided to timothy.coyle@sun.com. S2IBIS3 - PAST, PRESENT AND FUTURE Ambrish Varma, North Carolina State University Ambrish Varma summarized the current progress on S2IBIS3 development. At present, the tool is Java-based to ensure maximum compatibility across all platforms. All keywords supported by S2IBIS2 are included, plus support for series elements, such as [Series MOSFET], has just been added. For the longer term a graphical user interface, perhaps including parser and model library support, could be included, with macromodeling features to enable power supply noise analysis and the like. A specification document is being written to summarize how S2IBIS3 approaches IBIS creation and the assumptions made outside of IBIS requirements. Ambrish concluded by soliciting feedback on the current beta. Lynne Green observed that, while SSO and power/ground bounce information would be highly useful, the original IBIS specification contained no keywords to support inclusion of the data. Simulations which show these effects rely on approaches and assumptions outside of the IBIS keywords. Mike LaBonte suggested that the current command (CMD) file information could be exported into the appropriate sections of the output file as comments, to inform the user as to how the data was derived. In response to an inquiry about I-V sweeping, Ambrish observed that DC sweeps are used to generate I-V curve tables; this raised concern about the differences between transient and DC sweep assumptions in biasing and convergence. Ed Sayre noted with some concern that the future work needed to complete S2IBIS3 work was not funded. A detailed discussion was deferred until the end of the meeting. AN ICM EXAMPLE USING A SEMICONDUCTOR DEVICE PACKAGE Michael Mirmak, Intel Corp Michael presented a typical application of ICM 1.0 to semiconductor designs, a ball-grid array (BGA) package. He reviewed the structure of BGA packages, how they might be modeled under IBIS 3.2/4.0 and showed a detailed ICM version of a differential pair within a BGA package. The particular example used nodal mapping of RLGC section data. Clearly, ICM resolves the problem of the IBIS package format, where model authors had to choose between creating multi-segment models of a package or creating a fully coupled model. Michael noted that, for full compatibility with current multi-conductor RLGC modeling approaches, support for additional RLGC data tables showing frequency-based variations should be added to a future ICM revision. Michael also noted that Kelly Green, the ICM parser developer, expects to have an alpha release ready in early November. Several people pointed out a minor typographical error in the ICM model presented. Also, there were a few inquiries as to how the nodal format connects separate sections together when each section differs in the number of nodes or interconnects modeled. Finally, there were several questions regarding whether the resistance matrices, which show diminishing values in ohms for off-diagonal terms, include conductance effects or not. Michael promised to research this and provide more technical details to individual participants. The example ICM model set presented in Michael's slides is available as a separate file on the IBIS web site. The suggested corrections will be made in the posted version. USE OF [RAMP] IN IBIS 4.1 Lynne Green, Cadence Design Systems Lynne summarized the history of the [Ramp] keyword, by observing its use and associated assumptions in IBIS 1.0. While V-t curve support was added in IBIS 2.1 to more realistically model the non-linear transitions of buffers, [Ramp] was kept for compatibility. The data in the keyword is highly useful for estimating an initial timestep for simulation and also for estimating crosstalk effects. Unfortunately, the utility of [Ramp] is compromised by misuse of the keyword data -- for example, normalizing the data to "1 ns" dt instead of collecting correct dV and dt data for the buffer into the appropriate load. At present, data for single-ended buffers can be collected with almost any resistive load similar to that expected under normal conditions. For differential buffers, the single-ended termination voltage assumptions break down, though comments can help to eliminate some confusion. BIRD75 extensions threaten to cause more issues, as the flexibility of AMS or Berkeley SPICE designs under IBIS 4.1 make a single recommendation for collecting [Ramp] data impossible to create -- how should one create [Ramp] data for a programmable slew rate buffer? Currently, BIRD85 has been proposed to make [Ramp] a requirement for [External Model] data, so that the utility of [Ramp] for timestep and crosstalk estimation is preserved. The language of BIRD85 clarifies exactly what the [Ramp] data means and how it should be generated. Michael Mirmak pointed out the risks in "overloading" the [Ramp] keyword's meaning, as models today appear which badly misuse the keyword or ignore the data derivation rules for it. John Angulo pointed out that the real intent of the keyword in advanced applications is to define a slew time target, which some tools already explicitly request. Mike LaBonte raised the issue of adding termination voltage and resistance information to the keyword. Lynne pointed out that, while this would help with some differential loading types, this would not preserve the original keyword nor would it provide a general solution for future designs. DETAILS ON TRUE DIFFERENTIAL BUFFER CHARACTERIZATION REVISITED Arpad Muranyi, Intel Corp. Arpad presented his slides as an extension of previous talks by himself and Hazem Hegazy on differential modeling at the 2000, 2001, and 2002 IBIS Summits. The updated slides take the 2002 proposed method of generating differential and common mode curves for an IBIS model and show how this method actually can be implemented using IBIS 3.2 keywords. Arpad pointed out that, while his new method satisfactorily accounts for differential currents and capacitances, the 3.2 series element keywords necessary to properly describe these effects are not universally available in IBIS compatible tools today. The essence of the new I-V model technique is to generate common mode currents, captured under the standard [Model] keywords and subparameters, while placing differential mode currents under a series element keyword ([Series MOSFET], [Series Current], etc. which would "tie together" the two common mode models. By creating a surface plot and normalizing the plot so that diagonal currents are zero, the off-diagonal components can be used for the differential mode model. The current along the diagonal becomes the common mode model data. This can be fairly easily accomplished using Perl and a SPICE simulation tool, though new Matlab toolboxes may ease the process. V-t curves can be generated by canceling the differential currents with a dependent current source controlled by coefficients resulting from the earlier I-V sweeps. Arpad also showed a differential capacitance meter based upon an AC (frequency-domain) sweep of the buffer of interest, with appropriate biasing. The differential and common mode components of C_comp can be measured using this method and expressed using [Model] and series element keywords as with the I-V curves above. Using a correct C_comp value and combined [Model] and series element keyword data yields excellent transient and DC matching between transistor and IBIS models. The matching is less accurate when only the buffer's internal load (no external load) is used for the correlation. Similarly, mismatched transmission lines show miscorrelation, though the results for transmission lines with impedances matched to the buffer data's load resistance showed very good matching. Data dependencies, seen as rising and falling asymmetries, appeared in the transistor-level model which IBIS 3.2 cannot match. Many of these issues may be addressed more completely using an IBIS 4.1 AMS-based model. Both Arpad and Ed Sayre noted that rising vs. falling asymmetries have been noted in actual (simulated) designs. The participants agreed that further study was needed of Arpad's techniques before meaningful feedback could be provided. OTHER DISCUSSIONS AND AD HOC PRESENTATIONS The post-presentation discussions focused primarily on IBIS futures, specifically regarding ICM, S2IBIS3, and technical issues related to IBIS 4.1. Ed Sayre strongly suggested that an ICM roadmap be prepared, to include the adoption steps necessary by tool vendors, the support plan of the Open Forum, and the timeline of these actions plus specification enhancements. Arpad added questions regarding the applicability of ICM to other types of interconnect, specifically on-die: could ICM be used to describe power and ground networks inside the die as well as on packages? Ed followed this with questions regarding the use of ICM for power-ground modeling: are "bedspring" models of power delivery networks the only option under ICM, or are plane models also possible? Michael Mirmak commented that, at present, ICM was most suitable for packages and PCB-related interconnects, while the multi-lingual extensions of IBIS 4.1 were intended to assist modeling of on-die interconnects. Michael provided a brief sketch of ICM's potential direction: - provide frequency-dependent RLGC support - clarify interfacing to IBIS models - clarify the relationship between ICM and IBIS 4.1 multi-lingual extensions - (potentially) enable ICM as a "fourth extension" in a post-4.1 version of IBIS Bob Ross commented that the use of ICM as an IBIS extension was complicated by ICM's existence as an independent specification. As with VHDL-AMS and Verilog-AMS, any connection between ICM and IBIS cannot be easily "built-in" to the ICM specification. Ed Sayre suggested that a detailed ICM roadmap could be prepared as follows: - provide regular status reports - gather consensus from major stakeholders on ICM's direction - use DesignCon as a forum for presenting the plans - reintroduce ICM to the modeling community, who may be desensitized to discussions due to the long delay in finalizing the specification If needed, major connector and cable manufacturers can be involved, perhaps even to supply funds if further development expenses are foreseen. Ed also raised the earlier issue of S2IBIS3 financial support. He noted that, while Java certainly was platform-independent, were there other options which may be more easily adopted? Also, as this is a freely distributed "product," was the Open Forum involved in raising money for it, as it is being developed for non-commercial purposes? Both Bob Ross and Michael Mirmak commented that, as with earlier discussion of open source distribution of the IBIS parser, the Open Forum must refrain from offering "products" which may create additional competitive pressure for its members. In such a situation, no incentive remains for IBIS to retain and grow its membership, if no benefit and calculable loss results to companies who joined. For the foreseeable future, S2IBIS3 will be supported indirectly by the Open Forum, through research and technical feedback, but will not be offered or controlled directly by the Open Forum. Regarding [Ramp], John Angulo summarized his BIRD85 work, and concluded that while needed, the approach used for [external Model] may turn out to be "flaky" and too dependent on author interpretation. Already, [Ramp] data for differential models is "fudged" to comply with the IBIS single-ended derivation requirements. Arpad concurred, asking whether it was desirable to add a "dual-use" keyword to the IBIS 4.1 specification. Further discussion of this issue will take place at upcoming Open Forum meetings. Finally, in discussing upcoming events, Bob Ross noted that the European IBIS Summit is currently scheduled to take place at DATE 2004 on February 20 in Paris. CONCLUDING ITEMS Michael Mirmak again thanked the presenters and NESA sponsors for their help and support in making the Summit a success. After reminding the participants regarding the next Open Forum teleconference, Michael closed the IBIS Summit Meeting. NEXT MEETING: The next Open Forum teleconference has been scheduled for November 14 from 8:00 AM to 10:00 AM US Pacific Standard Time. Votes regarding the approval of BIRD83, BIRD84 and BIRD85 are scheduled. ============================================================================ NOTES IBIS CHAIR: Michael Mirmak (916) 356-4261, Fax: (916) 377-1046 michael.mirmak@intel.com Senior Analog Engineer, Intel Corporation M/S FM6-45 1900 Prairie City Rd. Folsom, CA 95630 VICE CHAIR: Lynne Green (425) 788-0412, Fax: (425) 451-1871 lgreen@cadence.com Senior Modeling Engineer, Cadence Design Systems 320 120th Ave NE, Suite B-103, Bellevue, WA 98005-3016 SECRETARY: Randy Wolff (208) 363-1764, Fax: (208) 368-3475 rrwolff@micron.com Simulation Engineer, Micron Technology, Inc. 8000 S. Federal Way Mail Stop: 1-711 Boise, ID 83707-0006 LIBRARIAN: Roy Leventhal (847) 590-9398 roy.leventhal@ieee.org Consultant, Leventhal Design and Communications 1924 North Burke Drive Arlington Heights, Illinois 60004 WEBMASTER: Syed Huq (408) 525-3399, Fax: (408) 526-5504 shuq@cisco.com Manager, Hardware Engineering, Cisco Systems 170 West Tasman Drive San Jose, CA 95134-1706 POSTMASTER: John Angulo (425) 497-5077, Fax: (425) 881-1008 John_angulo@mentor.com Development Engineer, Mentor Graphics 14715 N.E. 95th Street, Suite 200 Redmond, WA 98052 This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. 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Job posting information is not permitted. ibischk-bug@eda.org To report ibischk2/3 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs. To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, /pub/ibis/bugs/s2ibis2/bugs2i2.txt, and /pub/ibis/bugs/s2iplt/bugsplt.txt respectively. Information on IBIS technical contents, IBIS participants, and actual IBIS models are available on the IBIS Home page found by selecting the Electronic Information Group under: http://www.eigroup.org/ibis/ibis.htm Check the pub/ibis/directory.html file on eda.org for more information on previous discussions and results. Other brands and names are the property of their respective owners.