FILE: a103106.txt
TITLE: Agenda 
TYPE: .txt
AUTHORLAST:
AUTHORFIRST:
COMPANY: IBIS Open Forum
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: m103106.txt
TITLE: Minutes
TYPE: .txt
AUTHORLAST:
AUTHORFIRST:
COMPANY: IBIS Open Forum
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: mirmak.zip
TITLE: The Direction of IBIS as a Standard 
TYPE: .ppt (ZIP)
AUTHORLAST: Mirmak
AUTHORFIRST: Michael
COMPANY: Intel Corporation
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: mirmak.pdf
TITLE: The Direction of IBIS as a Standard 
TYPE: .pdf
AUTHORLAST: Mirmak
AUTHORFIRST: Michael
COMPANY: Intel Corporation
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: kusunoki.zip
TITLE: IBIS Model Engineering for SI Analysis
TYPE: .ppt (ZIP)
AUTHORLAST: Kusunoki
AUTHORFIRST: Kazuhiko
COMPANY: Cybernet Systems, Japan
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: kusunoki.pdf   
TITLE: IBIS Model Engineering for SI Analysis
TYPE: .pdf
AUTHORLAST: Kusunoki
AUTHORFIRST: Kazuhiko
COMPANY: Cybernet Systems, Japan
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: wang.pdf
TITLE: Case Study - Spice Macromodeling for PCI Express Using IBIS 4.2
TYPE: .pdf
AUTHORLAST: Wang
AUTHORFIRST: Lance
COMPANY: Cadence Design Systems
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: katz.pdf
TYPE: .pdf
TITLE: System-Level Timing Closure Using IBIS Models
AUTHORLAST: Katz
AUTHORFIRST: Barry
COMPANY: Signal Integrity Software
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: chitwood.pdf
TYPE: .pdf
TITLE: System-Level SSO Simulation Techniques with Various IBIS Package Models
AUTHORLAST: Chitwood*, Jack W.C. Lin**  and Raymond Y. Chen* 
AUTHORFIRST: Sam  
COMPANY: Sigrity, *USA and **China
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: watanabe.zip  
TITLE: JEITA EDA - WG Activity
TYPE: .ppt (ZIP) 
AUTHORLAST: Watanabe and JEITA 
AUTHORFIRST: Takeshi
COMPANY: NEC Electronics, Japan
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: watanabe.pdf
TITLE: JEITA EDA - WG Activity
TYPE: .pdf
AUTHORLAST: Watanabe and JEITA 
AUTHORFIRST: Takeshi
COMPANY: NEC Electronics, Japan
DATE: Oct 31 2006
LOCATION: Tokyo, Japan
          
FILE: ikeda.zip  
TITLE: Study of Interconnect Model
TYPE: .ppt (ZIP) 
AUTHORLAST: Ikeda
AUTHORFIRST: Hiroaki 
COMPANY: Japan Aviation Electronics, Japan
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: ikeda.pdf
TITLE: Study of Interconnect Model
TYPE: .pdf
AUTHORLAST: Ikeda
AUTHORFIRST: Hiroaki 
COMPANY: Japan Aviation Electronics, Japan
DATE: Oct 31 2006
LOCATION: Tokyo, Japan
  
FILE: dodd.zip 
TITLE: IBIS 4.2 and VHDL-AMS for Serdes and DDR2 Analysis
TYPE: .ppt (ZIP)
AUTHORLAST: Dodd and Gary Pratt
AUTHORFIRST: Ian
COMPANY: Mentor Graphics
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: dodd.pdf  
TITLE: IBIS 4.2 and VHDL-AMS for Serdes and DDR2 Analysis
TYPE: .pdf
AUTHORLAST: Dodd and Gary Pratt
AUTHORFIRST: Ian
COMPANY: Mentor Graphics 
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: ross.zip
TITLE: ODT, Pre-Emphasis and Speed 
TYPE: .ppt (ZIP)
AUTHORLAST: Ross
AUTHORFIRST: Bob
COMPANY: Teraspeed Consulting Group
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: ross.pdf
TITLE: ODT, Pre-Emphasis and Speed 
TYPE: .pdf
AUTHORLAST: Ross
AUTHORFIRST: Bob
COMPANY: Teraspeed Consulting Group
DATE: Oct 31 2006
LOCATION: Tokyo, Japan

FILE: muranyi.pdf
TITLE: PDA for SI Analysis in LTI Systems - A VHDL-AMS Test Case
TYPE: .pdf
AUTHORLAST: Muranyi and Michael Mirmak
AUTHORFIRST: Arpad
COMPANY: Intel Corporation
DATE: Oct 31 2006
LOCATION: Tokyo, Japan