CONTENTS OF THE EIA IBIS OPEN FORUM SUMMIT MEETING October 15, 1998 Boxboro, Massachusetts .zip Compressed .ppt Power Point .doc Word .ps Postscript .pdf Acrobat .txt Text ADMINISTRATIVE DOCUMENTS: 00readme.txt This Document a101598.txt Agenda m101598.txt Minutes PRESENTATIONS (IN ORDER OF PRESENTATION): ross.zip INTRODUCTION & MODEL PROCESSING ALGORITHMS (.ppt) Bob Ross (Interconnectix/Mentor Graphics Corporation) sayre.zip The IBIS USER SUMMIT '98 (.ppt) Ed Sayre socha.zip IBIS TRAINING (.ppt with notes) Joseph Socha (TRILOGIC) fabrizio_conn.ppt IBIS CONNECTOR MODELS: WORKING GROUP STATUS Fabrizio Zanella (EMC Corporation) ansari.zip BEHAVIORAL/IBIS MODELING OF A FET BUS SWITCH USING CADENCE TOOLS (.ps) Tay Ansari (Sun Microsystems) haller.zip IBIS ACCURACY SPECIFICATION (.ppt) ibisacc.zip IBIS ACCURACY SPECIFICATION (.doc) Robert Haller (Compaq Computer Corporation) laflamme.zip IBIS TEST BOARD (.ppt) Peter LaFlamme (Fairchild Semiconductor) fabrizio_si.ppt IBIS CASE STUDIES: COMPARISONS OF SIMULATIONS Fabrizio Zanella (EMC Corporation) chen.zip COMPARISONS BETWEEN SPICE AND IBIS I/O DEVICE SIMULATIONS (.ppt) Jinhua Chen (North East Systems Associates) powell.zip TIPS AND TRICKS FOR CREATING IBIS MODELS (.ppt with notes) Jon Powell (Viewlogic Consulting Services) ross.zip INTRODUCTION & MODEL PROCESSING ALGORITHMS (.ppt) (repeated) (Continuation of above presentation) Bob Ross (Interconnectix/Mentor Graphics Corporation) hobbs.zip IBIS EVOLUTION AND ADOPTION (.ppt) Will Hobbs (Intel Corporation) schreyer.zip TOOL CAPABILITIES NEEDED FOR DESIGNING 100 MHZ INTERCONNECTS (.pdf) Tim Schreyer (Intel Corporation)