EIA IBIS OPEN FORUM SUMMIT MEETING AGENDA
                    October 15, 1998
                  Boxboro Holiday Inn
               One Adams Place, Boxboro, MA

8:30 A.M.  REFRESHMENTS & INFORMAL GATHERING

9:00       WELCOME, INTRODUCTIONS OF PARTICIPANTS
           Ed Sayre (NESA), Bob Ross (Mentor Graphics)

9:15       GENERAL IBIS BUSINESS		
           /DESIGNCon99 Sponsorship of EIA IBIS Summit
           Bob Ross (Mentor Graphics)

9:30       IBIS TRAINING TUTORIAL
           Ed Sayre (NESA), Joe Socha (Trilogic)

10:30      BREAK & OPTIONAL DEMOS

11:00      IBIS TUTORIAL (CONTINUATION)

11:40      IBIS CONNECTOR MODEL DEFINITION BIRD
           Fabrizio Zanella (EMC)

12:00 P.M. LUNCH (SUPPLIED FREE TO ATTENDEES)

12:30      OPTIONAL DEMOS 

1:00       BEHAVIORAL/IBIS MODELING OF A FET BUS SWITCH USING CADENCE TOOLS
           Tay Ansari (Sun Microsystems)


1:20 	   IBIS ACCURACY SPECIFICATION
           Bob Haller (Compaq)

1:40	   IBIS ACCURACY TEST BOARD
           Peter LaFlamme (Fairchild Semiconductor)

2:00 	   MEASUREMENT AND SIMULATIONS USING VARIOUS TOOLS DEMONSTRATING
           AND COMPARING 1) MEASUREMENTS, 2) SPICE USING SPICE MODEL,
           3) VENDORS "A" AND "B" USING IBIS MODELS
           Fabrizio Zenella (EMC)

2:20	   COMPARISON BETWEEN SPICE AND IBIS I/O DEVICE SIMULATIONS
           Jinhua Chen (NESA)

2:40       BREAK

       
3:00       WRITING AND VERIFICATION OF IBIS MODELS
           Jon Powell (Viewlogic)

3:20       MODEL PROCESSING ALGORITHMS
           Bob Ross (Mentor Graphics)

3:40       IBIS FUTURES
           Will Hobbs (Intel)

4:00       TOOL CAPABILITIES NEEDED FOR DESIGNING 100 MHZ INTERCONNECTS
           Tim Schreyer & Ray Martin (Intel)

4:30       BUSINESS WRAP-UP
           Bob Ross (Mentor Graphics)

4:40       END OF MEETING

           OPTIONAL DEMOS

           OPTIONAL SOCIAL HOUR

           OPTIONAL GROUP DINNER AT HOTEL