Subject: RE: [IBIS-Users] IBIS bump question
From: Muranyi, Arpad (arpad.muranyi@intel.com)
Date: Fri Nov 22 2002 - 15:17:50 PST
I don't have any strong preferences where it is modeled, but
for the sake of consistency I would mention that solder balls
are part of the package, not the PCB to which the chip is soldered.
So similarly, I would think that the bumps should be part of the
die and not the package to which it is soldered (welded?).
Arpad Muranyi
Intel Corporation
===================================================================
-----Original Message-----
From: Syed Huq [mailto:shuq@cisco.com]
Sent: Friday, November 22, 2002 3:08 PM
To: tom@teraspeed.com; fred@apsimtech.com
Cc: ehsu@netlogicmicro.com; ibis-users@eda.org
Subject: Re: [IBIS-Users] IBIS bump question
A 'bump' is on the die and a RDL(redistribution later)connects the bump to
the package..
Maybe it should be part of the die instead..
Syed
>Date: Fri, 22 Nov 2002 14:29:48 -0800
>From: Fred Balistreri <fred@apsimtech.com>
>X-Accept-Language: en
>MIME-Version: 1.0
>To: tom@teraspeed.com
>CC: "'Eric Hsu'" <ehsu@netlogicmicro.com>, ibis-users@eda.org
>Subject: Re: [IBIS-Users] IBIS bump question
>Content-Transfer-Encoding: 7bit
>
>It does not matter, so long as it does not get double counted. I believe
>the solder bump may appear in the CAD package data base. If so it should
>be made part of the package not the IC.
>
>Best Regards,
>
>Tom Dagostino wrote:
>>
>> I started to say the bump C should be part of the package but in
reflection
>> it seems to be part of the die. I'd vote for as part of C_comp because
it
>> is part of the metalization on the die.
>>
>> Tom Dagostino
>> Device Modeling Division
>> Teraspeed Consulting Group LLC
>> 2926 SE Yamhill St.
>> Portland, OR 97214
>> (503) 430-1065
>> tom@teraspeed.com
>> http://www.teraspeed.com
>>
>> -----Original Message-----
>> From: owner-ibis-users@server.eda.org
>> [mailto:owner-ibis-users@server.eda.org]On Behalf Of Eric Hsu
>> Sent: Friday, November 22, 2002 12:20 PM
>> To: ibis-users@server.eda.org
>> Subject: [IBIS-Users] IBIS bump question
>>
>> Hi all,
>>
>> For a wire-bond package, the RLC of the bondwire is generally considered
>> to be part of the package. For a flip-chip package, is there a
convention
>> for how the bump parasitics should be handled? Is the bump to be
>> considered part of the package, or part of the die(C_comp)?
>>
>> Regards,
>>
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>--
>Fred Balistreri
>fred@apsimtech.com
>
>http://www.apsimtech.com
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