RE: [IBIS-Users] Validation of IBIS model


Subject: RE: [IBIS-Users] Validation of IBIS model
From: Ingraham, Andrew (Andrew.Ingraham@hp.com)
Date: Mon Jan 06 2003 - 07:44:40 PST


Hello Anshuli,

One thing that I think you haven't mentioned yet, is what simulator you used
for testing your IBIS model. Maybe that's part of the problem.

Regarding the Timestep issue. Sometimes merely changing the timestep
fixes a problem. But more often than not, it is just a symptom of another
problem somewhere else: changing the timestep changes the results, but
neither set of results might be correct. In such a case, you need to look to
somewhere other than the timestep to fix the problem.

Sometimes the timestep was the problem, and reducing it by several
orders of magnitude can indeed fix it. To get more confidence that you
did the right thing, try a few more simulations, reducing the stepsize even
further (perhaps by one and two more orders of magnitude) and verify that
there is no further change. The timestep ought to be at least one, and
probably several, orders of magnitude smaller than the one that starts to
show reasonable results. If you are using a timestep that is even remotely
close to one that causes problems, you should ignore those simulations
entirely, even if they look right.

The results that you posted on Friday are clearly not right, but there is
no way to tell from it what's wrong. It is odd that the waveform is wildly
erratic but then suddenly seems to stabilize at 2.3V.

One way to get the waveform that you posted today (straight-line edges), is
if the timestep of the waveform being plotted, is much too large. If the only
waveform points are when the waveform is low and high, then the plotting
program connects them by straight lines and the result could be what you
saw. Can you highlight just the individual datapoints being plotted, as a
"sanity check"?

The four waveforms that Hazen Hegazy mentions, are:

(1) Rising edge, with V_fixture = Ground
(2) Rising edge, with V_fixture = VDD
(3) Falling edge, with V_fixture = VDD
(4) Falling edge, with V_fixture = Ground

These would be more useful too if R_fixture is reasonably close to the
load impedance seen by the driver. In many cases, this would be the
characteristic impedance of any trace normally connected to the output pin,
unless the trace is expected to be shorter than the rise+fall times.

Regards,
Andy

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