[IBIS-Users] Agenda, IBIS DesignCon Summit


Subject: [IBIS-Users] Agenda, IBIS DesignCon Summit
From: Lynne Green (lgreen@cadence.com)
Date: Fri Jan 17 2003 - 15:02:33 PST


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                   AGENDA, IBIS SUMMIT MEETING
                        JANUARY 27, 2003

                          Westin Hotel
                  Santa Clara Convention Center
                     Santa Clara, California

                Room: Magnolia Room, Westin Hotel
                      (check signs at site)

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8:00 AM Refreshments & Sign In

8:30 AM Introductions
            - Welcome to Summit
            - Introductions
            - IBIS Booth
            - Opens for Issues, Discussion Topics

8:45 AM IBIS Chair's Report
        Stephen Peters, Intel Corporation

9:00 AM Reflections on IBIS
            Bob Ross, Mentor Graphics

9:30 AM The Case Study of Board Simulation
            Atsuji Ito, Panasonic, JEITA EDA WG Chair

10:00 AM Break

10:15 AM IBIS Quality Committee Update / Practical Use of IQ
checklist
            Barry Katz, Signal Integrity Software Inc.

11:00 PM IBIS Modeling Experiences
            Tim Coyle, National Semiconductor

11:30 AM Data Dependent Buffer Characteristics
            Arpad Muranyi, Intel Corporation

12:00 PM Lunch - (Hosted by National Semiconductor)
            Westin Hotel

1:00 PM Lossy Line Simulation and Analysis
            Dima Smolysansky, TDA Systems, Inc.

1:30 PM IBIS Connector Modeling Specification: Status and Proposed
Changes
            Kelly Green, Consultant; Michael Mirmak, Intel Corporation

2:00 PM IBIS Interconnect Specification Draft
            Open discussion

2:30 PM Break

2:45 AM A BIRD 75 Multi-lingual Example
            Lynne Green, Cadence Design Systems, Inc.

3:15 PM IBIS 4.1 Discussions
            All

3:30 PM Open Discussion and Ad Hoc Topics
            All

4:45 PM Concluding Items
            - Next Open Forum Meeting February 14, 2003
            - DATE 2003, March 7, 2003, Munich, Germany

5:00 PM End of IBIS Summit Meeting

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REGISTRATION INFORMATION

People involved in IBIS Model development, EDA tool development, and
digital
circuit design are invited to participate to the Summit meeting. If you
plan
to participate, please register with the information below:

   Name:
   E-mail address:
   Company:
   Telephone:

Send to:

    Milt Swartz at National Semiconductor (schwartz@galaxy.nsc.com)

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Sponsors: DesignCon, National Semiconductor

DesignCon: January 27-30, 2003
                Santa Clara Convention Center
                Santa Clara, California
                See <http://www.designcon.com/2003/> for more
information.

LIST OF NEARBY HOTELS

See <http://www.designcon.com/2003/hotel.html> for travel directions,
hotels and other information.
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