Subject: [IBIS-Users] Load Line Question.
From: whiz kid (we_r_frendz@yahoo.com)
Date: Tue Jan 28 2003 - 10:21:44 PST
Hi Gurus,
I have a question regarding plotting load lines based
on the V-I tables.
1) I have a open drain model with V_fixture=1.26v and
R_fixture = 50ohms.There are two V-T tables ( one
rising and one falling with V_fixture= 1.26 and
R_fixture = 50ohms ). I calculated the load line based
on the values as I=0 at V=Vcc and I = 1.26/50 =25.2ma.
I then plotted this loadline on the Pulldown curve by
drawing a line with co-ordinates (1.26v,0ma),
(0v,25.2ma) and noted for the intersection of the VI
curve and the loadline. The intersection point that I
get is way off from the one the tool calculates, which
in turn is off from the VT table falling endpoint. My
question is what is it that I am missing so that I get
a different value from the tool and also fixing the
model so that I fall within the 1% tolerance of the VT
end point.
Thanks,
Rahul.
--- Peter LaFlamme <plaflamm@amcc.com> wrote:
> Hi John,
> These types of warnings are very common. It appears
> to me that you are either using an old IBISCHK or
> you are creating a Version 2.1 model because the
> latest IBISCHK will give errors for any mismatch
> greater than 1% or so. If your I/O is single-ended
> then
> you can determine where the problem is pretty
> easily. You need to determine what your output load
> is. In this case 50 ohms. Then plot your I-V curves
> and V-T curves. On the I-V curves you need to draw a
> 50-ohm load line. The load line intersection with
> the
> I-V curve should match the end point of the V-T
> curve (for rising waveform use the pull-up curve,
> Falling waveform use pull-down).
>
> Is this a differential output? If so what technology
> is it? Creating an IBIS model of a differential
> output can be very tricky. IBIS actually models the
> differential output as a single-ended entity which
> it is definitely not. My experience with LVDS, PECL
> and CML models has been that P and N output voltage
> levels are dependent on each other. For example on
> one of our LVDS I/O cells the sum of the P and N
> voltages will be 2.4V. So if the P side is 1.0V the
> N side will try to be 1.4V. To create a model as
> such you need to set up your simulation such that
> the N side load is a voltage source that is
> dependent on the P output.
>
> I have read the papers on the IBIS website and they
> are somewhat helpful, however the cases presented
> are applicable to certain cases only. There needs to
> be an IBIS cookbook that explains both the theory
> behind creating the models and the how to.
>
> Well enough about Differential.
>
> I hope that this helps.
>
> Peter
>
>
> Duane Mattheisen wrote:
> >
> > John
> > I was writing for a bench measurement not a
> simulation. The 50 ohms
> > is a common standard for the AC measurements. And
> if your on a AC bench
> > measuring of actual devices, a capacitor helps
> when put it on the power
> > supply side of the R_fixture not on the device
> side, what that does is
> > take any voltage drop out of the wires going from
> the power supply to
> > the R_fixture. For the DC measurement again on
> the bench the resistance
> > to make as low as possible is the fixture
> resistance which is between
> > the Voltage/Current measurement tool and the
> device.
> >
> > On another note I down loaded s2ibis2_fix_tar.Z
> and s2ibis2_tar.Z but
> > did not know how to work with them. Is there any
> advice you can give me
> > to start?
> >
> > Thanks Duane Matheisen
> > John Phillippe wrote:
> > >
> > > Duane Mattheisen wrote:
> > > > John Take out as much fixture resistance as
> possible in the DC
> > > > measurement.
> > > > Also for the AC measurement put a big
> capacitor (0.1uf and a >2.2uF
> > > > tantalum cap) to ground on the Rfixture having
> the other side of the
> > > > Rfixture that connects to the output as close
> as possible to the
> > > > output.
> > > > Sincerely
> Duane Mattheisen
> > > > "Angulo, John" wrote:
> > > >
> > > >>The following is posted on behalf of John
> Phillippe at Motorola. Please send any private
> replies to john.phillippe@motorola.com only.
> > > >>
> > >
> >>--------------------------------------------------
> > > >>
> > > >>Ibis Guru's,
> > > >> I get quite a few waveform mismatches
> between the rising/falling
> > > >>edges and the I/V curves like the one shown
> below.
> > > >>
> > > >>WARNING - Model pad_26v_fast: The [Falling
> Waveform]
> > > >> with [R_fixture]=50 Ohms and
> [V_fixture_max]=0V
> > > >> has MAX column DC endpoints of 0.05V
> and 1.75v, but
> > > >> an equivalent load applied to the
> model's I-V tables yields
> > > >> different voltages ( 0.16V and 1.91V),
> > > >> a difference of 6.66% and 8.94%,
> respectively.
> > > >>
> > > >>I'm curious if this is a common problem, or if
> there are some simple
> > > >>solutions to get everything to match up. I
> check the waveforms and set
> > > >>the sim time long enough to make sure the
> waveforms are stable. Any
> > > >>help/suggestions would be greatly appreciated.
> > >
> > > Duane,
> > > Since I'm using s2ibis2, I should make rload
> as small as possible?
> > > On the order of 1ohm? I read in this group
> before to use an rload of
> > > 50ohms since that is what most people are using,
> and that it is a bit of
> > > a "standard." I've also been told to have NO
> capacitance in the AC
> > > measurements, and again to only use a 50ohm
> resistor.
> > > I did try a run with a 0.1uF cap on the pad
> for the AC measurements,
> > > but that just slows the edge down.
> > >
> > > --
> > > John Phillippe
> > > SPS, 32 Bit Embedded Controller Division, IC
> Creation
> > > Motorola - 512-895-1835
> > > Austin, TX - john.phillippe@motorola.com
> >
>
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> --
> Peter LaFlamme
>
> Applied Micro Circuits Corp.
> System Applications Engineer
> 200 Minuteman Rd, 3rd Floor
> Andover, MA 01810
>
> 978-247-8470 phone
> 978-623-0055 Fax
>
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