[IBIS-Users] FET Switch Model with internal pulldown resistor


Subject: [IBIS-Users] FET Switch Model with internal pulldown resistor
From: Haque, Moshiul (mhaque@ti.com)
Date: Tue May 27 2003 - 08:06:22 PDT


I am trying to create an IBIS model for a parallel n-channel/p-channel
mosfet switch. At the high impedance state (i.e. OFF state) drain side of
the switch is connected to ground through a 500 ohm pulldown resistor. I am
not sure how to model this pulldown resistor since this is connected only in
the high-impedance state. If I model it in high impedance state the
simulator will combine this characteristics with the ON state of the switch
and the result will be inaccurate.

Any idea how to create the model?

Regards
Moshiul Haque
Standard Linear and Logic Marketing
Texas Instruments Incorporated
Ph: (903) 868-7153

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