Subject: RE: [IBIS-Users] C-Comp
From: hazem (hazem@qualim.com)
Date: Fri Jul 18 2003 - 06:40:50 PDT
Well, that's a good question!!
Driver output stage usually has large size transistors for driving
current capabilities. The drain-bulk capacitance of such transistors can
reach few Pico Farads in some cases. Never the less, transistor
capacitance also varies in a nonlinear way with drain/source/gate
voltage which make C-comp very critical parameter to model.
I hope this will help...
BR,
Hazem Hegazy
-----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Anshuli Goel
Sent: Friday, July 18, 2003 4:16 PM
To: 'ibis-users@eda.org'
Subject: [IBIS-Users] C-Comp
Hello Experts
I have one naive question.
While defining the C_Comp we say "C_comp defines the silicon die
capacitance. This value should not include capacitance of
the package.The C_comp capacitance must represent what you see when
you
look into the die at the die pad. This includes the die pad, metal
connections on the die, the driver transistor's capacitance, the
receiver
(input)capacitance, everything that is on the die."
But my understanding is that anyway the netlist is going to have driver
transistors in it in case of buffers, why do we need to account for the
capacitance for driver transistors ?? I can understand about the metal
connection and bond pad capacitance ,but I am not able to understand the
Transistors Capacitance part of it . Please clarify.
Regards
Anshuli
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