[IBIS-Users] RE: Question about diode model


Subject: [IBIS-Users] RE: Question about diode model
From: Lynne Green (lgreen@cadence.com)
Date: Thu Sep 04 2003 - 16:09:11 PDT


Hello, Eric,

There is a bulk resistance parameter (RS or equivalent) in the diode
model (with a default value of zero Ohms). This describes the fixed
(bulk) resistance through the junction. Some diode models have
additional parameters to describe the perimeter and surface resistances.
Depending on your diode layout, the current could be dominated by
perimeter currents rather than junction currents. (Note: if you prefer
to model this with an external resistor for each clamp, this resistor
could be placed on either side of the clamp diode, since this would be a
series connection.)

Similarly, there are usually two parameters in the MOSFET model to
describe the effective source and drain resistances. External resistors
could be used instead.

Moving the drain resistance to the source end is _not_ recommended,
since this changes the effective Vgs seen by the device, which in turn
changes the drive current.

If any resistance is strongly dependent on bias (i.e. the depletion
layer is a significant fraction of the distance from the junction to the
contact), then you would want to look more closely at the
equations/parameters implemented by your particular SPICE flavor. For
example, early Berkeley MOSFET and diode models did not support
bias-dependent bulk resistance.

Best regards,
Lynne

> -----Original Message-----
> From: Eric Hsu [mailto:owner-ibis-users@eda.org] On Behalf Of
> Eric Hsu
> Sent: Thursday, September 04, 2003 3:42 PM
> To: Ibis-Users (E-mail); Stephen Peters (E-mail)
> Cc: Frank Dunlap
> Subject: Question about diode model
>
> Hi Stephen Peters and IBIS expert,
>
> To obtain the accurate ibis model for output buffer, I'd like to know
> how can I separate junction and bulk resistance for output driver and
> parasitic diode.
> Stephen, when studying your the article, which is "IBIS FORUM I/O
> BUFFER MODELING COOKBOOK"-- Sep. 24,1997, I found on page 10, you ever
> mentioned that model creator may need to include junction and bulk
> resistance for driver and diode separately. If place non-silicide
> blocking layer to increase drain resistance, I wonder how people can
> separate them from parasitic diode. Because this parasitic resistance
> is really high, and it suppose only affect surface conduction current
> path, but not vertical path through bulk.
> Right now, there is only one way I have is insert those parasitic
> resistance only at source end, which mean, for driver portion, moving
> drain resistance to source end. Also, inserting all the bulk
> resistance between P-end of ground clamping diode to GND connection,
> and N-end of power clamping diode to PWR connection. Of course, it is
> not perfect idea, because it could cause some different voltage drop
> from pad to drain and source end.
> Any better idea? Or anything wrong from above statement?
>
> Best Regards,
>
> Eric Hsu
> Interface Technologies
> NetLogic Microsystems, Inc.
> 450 National Ave.
> Mountain View, CA 94043
> 650-961-6676 x198
> This e-mail contains NetLogic Microsystems, Inc. Confidential
> information
>
>

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