[IBIS-Users] Re: [IBIS] ECL Termination Voltage Question


Subject: [IBIS-Users] Re: [IBIS] ECL Termination Voltage Question
From: Bob Ross (bob@teraspeed.com)
Date: Thu Jan 15 2004 - 13:29:45 PST


Hi Tom:

The preset Vtt is not a problem because it is for the [Ramp]
only, and the [Ramp] is not used when you have V-T tables.

The switching shape problem was based on another issue which we
have been we been communicating with you privately.

Since the application is differential with 100 ohms differential
and 200 ohms to GND, a better V-T specification would still
be using the single-ended V-fixture to some equivalent Vtt
voltage and the R_fixture at around 50 ohms or lower. This
will be closer to the actual differential switching conditions
for the V-T waveform extractions and specifications.

Bob

Fisher, Thomas wrote:

> Bob, thanks for the response. Do I understand you correctly in that the
> Vtt is pre-set (base on Vcc) within the model type, ‘output_ECL?’ If
> this is the case, then it creates a problem for this particular model.
>
>
>
> Secondly, I am using the [Rising Waveform] and [Falling Waveform] but it
> does not correct this problem. The VT tables are created from Spice
> with 200 ohm resistors to ground. If ‘output_ECL’ is wanting to use the
> pre-set Vtt = Vcc - 2V with 50 ohm resistors, this is a problem.
>
>
>
> Who could I contact that could explain how the ‘output_ECL’ model type
> is constructed? Thanks. –T-
>
>
>
>
>
>
>
> Regards,
>
> Thomas Fisher
>
> Senior Systems Engineer
>
> Texas Instruments, Inc. Business: 214 480-3736
>
> P.O. Box 660199 MS8710 Fax: 214 480-3160
>
> Dallas, TX 75266-0199 tomfisher@ti.com <mailto:tomfisher@ti.com>
>
>
>
>
>
> Tom:
>
> My responses are in your text.
>
> Bob
>
> Fisher, Thomas wrote:
>
>> All,
> >
> > I have a PECL driver that I am modeling that has a non-standard load (pi
> > network to ground) which results in a larger Vod. (1.2-V vs. 800mV)
> > What happens during simulation is the single-ended waveform depicts a
> > slowness of the rising edge which results in a plateau effect on the
> > rise/fall of the differential waveform. (It looks great when simulating
> > in TISpice) Most (P)ECL termination is going to be 50 ohms to Vtt for
> > both non-inverting and inverting outputs whereas Vtt = Vcc – 2-V. Under
> > the load I am simulating we are using 200 ohms to ground. (customers’
> > request)
> >
> >
> >
> > Having said that, looking in the 3.2 spec on page 78 under ramp rates
> > model_type for output_ECL it mentions 50 ohm resistor to the termination
> > voltage (Vterm = Vcc – 2-V). Is this Vterm embedded into the
> > specification?
>
> Yes
>
> Is there a way to specify that the load is 200 ohms to
>> ground?
>
> Yes, but you must use the [Rising Waveform] and [Falling Waveform]
> method and describe the waveform. This will override the [Ramp]
> keyword, which cannot correctly specify the situation you describe.
>
> I believe this might be causing the abnormality. Any
>> help/insight would be appreciated. Thanks in advance.
>>
>>
>>
>> Regards,
>>
>> Tom Fisher
>>
>>
>>
>
> --
>
> Bob Ross
>
> Teraspeed Consulting Group LLC Teraspeed Consulting Group LLC
>
> 2926 SE Yamhill St. Device Modeling Division
>
> Portland, OR 97214 13610 SW Harness Lane
>
> 503-239-5536 Beaverton, OR 97008
>
> http://www.teraspeed.com 503-430-1065
>
> bob@teraspeed.com <mailto:bob@teraspeed.com?subject=Re:%20%5bIBIS%5d%20ECL%20Termination%20Voltage%20Question&replyto=40042324.90405@teraspeed.com> 503-246-8048 Direct
>
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-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Consulting Group LLC
2926 SE Yamhill St.                Device Modeling Division
Portland, OR 97214                 13610 SW Harness Lane
503-239-5536                       Beaverton, OR 97008
http://www.teraspeed.com           503-430-1065
bob@teraspeed.com                  503-246-8048 Direct

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