Subject: RE: [IBIS-Users] Verilog_AMS models
From: Muranyi, Arpad (arpad.muranyi@intel.com)
Date: Fri Jan 16 2004 - 16:14:29 PST
Fabrizio,
You can also look at the presentation
http://www.eda.org/pub/ibis/summits/jun03a/muranyi1.pdf
and the two accompanying files
http://www.eda.org/pub/ibis/summits/jun03a/IBIS_basic_IO.vhd
and
http://www.eda.org/pub/ibis/summits/jun03a/IBIS_multiVt_IO.vhd
Arpad Muranyi
Intel Corporation
================================================================
-----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On Behalf Of Angulo, John
Sent: Friday, January 16, 2004 3:37 PM
To: 'ibis-users@eda.org'
Subject: [IBIS-Users] Verilog_AMS models
The following is posted on behalf of Fabrizio Zanella at Broadbus Technologies. Please send any private replies to fzanella@broadbus.com
-------------------------------------------------
I see that VHDL AMS and Verilog AMS models are included in IBIS 4.1. Can
someone describe what these models are or point me to a web site where I
can find information on them?
Thanks and regards,
Fabrizio Zanella
Principal Hardware Design Engineer
Broadbus Technologies
fzanella@broadbus.com
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