Subject: [IBIS-Users] Slew-Rate controlled output buffers
From: John Phillippe (john.phillippe@motorola.com)
Date: Tue Feb 17 2004 - 08:34:31 PST
I've been looking into the best way to model slew-rate controlled output
buffers in IBIS. It is my current understanding that IBIS doesn't
really support this. When I say slew-rate controlled output buffer, the
best way to describe it would be that for a given load range, say
10pF-100pF the output buffer will always have the same slew-rate.
Unlike say a simple cmos inverter where if you increase the output load,
the slew rate will slow down. The biggest issue in my mind is the I/V
curves. Since they are a DC sweep, you always get the highest drive on
the output buffers. Has anybody tackled this issue? Anyone have any
thoughts/solutions?
-- John Phillippe SPS, 32 Bit Embedded Controller Division, IC Creation Motorola - 512-895-1835 Austin, TX - john.phillippe@motorola.com|------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993
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