RE: [IBIS-Users] VHDL-AMS Model

From: lgreen <lgreen22@mindspring.com>
Date: Tue Feb 01 2005 - 08:49:41 PST

Hello, Lee,

There are a number of simulators that can handle *-AMS with IBIS and SPICE.
HyperLynx does this using Mentor's "Eldo" simulator. Perhaps others on this
list can comment on HSPICE, SPECCTRAQuest, and other tools.

Links to the standards organizations:
http://www.vhdl.org/analog/ (IEEE 1076.1 Working Group)
http://www.eda.org/verilog-ams/ (Accellera Verilog Analog Mixed-Signal
Group)

Best regards,
Lynne

"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com

-----Original Message-----
From: lee yang [mailto:changly_80@hotmail.com]
Sent: Tuesday, February 01, 2005 5:41 AM
To: lgreen22@mindspring.com; ibis-users@eda.org
Subject: RE: [IBIS-Users] VHDL-AMS Model

Hello Lynne,

Thanks a lot for your prompt responce and the useful information.
Do you have a link or document showing how to model the VHDL-AMS model?
Btw, what tools support the simulation of VHDL-AMS model? Are HyperLynx and
Hspice able to simulate this model?

Thanks again for your excellent support so far.
- Lee

>From: "lgreen" <lgreen22@mindspring.com>
>To: "'lee yang'" <changly_80@hotmail.com>, <ibis-users@eda.org>
>Subject: RE: [IBIS-Users] VHDL-AMS Model
>Date: Mon, 31 Jan 2005 08:40:14 -0800
>
>Hello, Lee,
>
>An excellent question.
>
>VHDL-AMS (and Verilog-AMS) are standards. They support mixed-signal
>modeling. One can express a functional block, such as a MUX or I/O buffer,
>as a digital, analog, or mixed-signal block. Analog blocks can be
>expressed
>as equations, including if/then controls, which has both advantages over
>table-based models (such as taking into account independent variations with
>Vcc and Temperature).
>
>Starting with IBIS 4.1, VHDL-AMS, Verilog-AMS, and SPICE 3f5 models are
>allowed as model formats for IBIS, under the [Model] keyword. All of these
>can be used as behavioral or structural descriptions of a block, such as an
>I/O buffer or a MUX. Please see the IBIS 4.1 specification for details.
>
>Best regards,
>Lynne
>
>"IBIS training when you need it, where you need it."
>
>Dr. Lynne Green
>Green Streak Programs
>http://www.greenstreakprograms.com
>425-788-0412
>lgreen22@mindspring.com
>
>
>-----Original Message-----
>From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
>Of lee yang
>Sent: Sunday, January 30, 2005 9:35 PM
>To: ibis-users@eda.org
>Subject: [IBIS-Users] VHDL-AMS Model
>
>Hi,
>
>Recently I heard about another behavioral model call VHDL-AMS, can anyone
>please give some background about it?
>Since we already have IBIS model, what is the reason we need to use
>VHDL-AMS
>
>model instead? What is the pros and cons compared to IBIS model?
>Thanks and appreciate if someone can shed some light.
>
>-Lee Yang
>

|------------------------------------------------------------------
|For help or to subscribe/unsubscribe, email majordomo@eda.org
|with just the appropriate command message(s) in the body:
|
| help
| subscribe ibis <optional e-mail address, if different>
| subscribe ibis-users <optional e-mail address, if different>
| unsubscribe ibis <optional e-mail address, if different>
| unsubscribe ibis-users <optional e-mail address, if different>
|
|or email a written request to ibis-request@eda.org.
|
|IBIS reflector archives exist under:
|
| http://www.eda.org/pub/ibis/email_archive/ Recent
| http://www.eda.org/pub/ibis/users_archive/ Recent
| http://www.eda.org/pub/ibis/email/ E-mail since 1993
Received on Tue Feb 1 08:49:46 2005

This archive was generated by hypermail 2.1.8 : Tue Feb 01 2005 - 08:49:52 PST