RE: [IBIS-Users] C_Comp measurement using HSPICE AC analysis

From: CW - Doran David <davidd_at_.....>
Date: Wed Mar 02 2005 - 09:57:35 PST
Hello : 

I saw some recent emails regarding C_Comp and wanted to share 
a measurement method I am using at Toshiba with AC analysis 
in HSPICE.  I have the code with comments below for a I/O buffer
Bidi Pad.  The I/O is tristated, and then AC analysis is used to
get the ZIN with that gives you "j x omega x Cin" with Cin = C_comp.

Also, let me know if this method is kosher.  You can try it out
and see what you get for C_comp if you wish.  A sample hookup 
is shown below which you can modify with your circuit instance.

Best Regards,
Doran David 
 ________________________________________________________________
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---- Sample HSPICE code to measure c_comp for I/O buffer ----


********===============================================================********
*****************  Circuit Hookup                              ****************
********===============================================================********
*
* ZSPCIXIO Pins :
* ----------------
* DIO   : Bidi Pad DIO 
* RX    : Output to core  - receive data
* TX    : input from core - transmitted data
* PD    : Input from core - Powerdown (0 = enabled/receive mode)
* 
* Function:
* --------
* if EN=1, cell is driving   with DIO = TX
* if EN=0, cell is receiving with RX  = DIO
* 
XPCIXIO  DIO  EN  TX  TXB  RX  RXB  VDDS  VDDS2  VDDC  VSS2  VSS  PCIXIO
********===============================================================********

********===============================================================********
*****************   AC ANALYSIS and C_Comp Measurement        *****************
********===============================================================********
*
* Set Frequency used to measure C_COMP here :
* -----------------------------------------
.param pfreq  = 133Meg           $ Frequency for C_Comp Measurement
+      pi     = 3.1415926535     $ Sorry: My calculator only showed 10 decimals
*
* DC Inputs :
VTX     TX     VSS2 DC  'pvss'   $ don't care.
VEN     EN     VSS2 DC  'pvss'   $ Enable tied low for tristate (DIO is input)
*
* DIO (input) voltage source has 1.65V (VDDS/2) DC bias and 1mV RMS AC bias:
* -----------------------------------------------------------------------
VINAC   DIO    VSS  DC  'pvtt'  AC  1mV
*
* This performs a frequency sweep by 10 points per decade from 1kHz to 1GHz:
* -------------------------------------------------------------------------
.AC  DEC  10  100K  1000Meg 
* 
* .NET starts the AC Network Analysis (VINAC is input voltage source) :
* -------------------------------------------------------------------
* Syntax for 1-port : .net VINAC       <--- using this one and measuring ZIN.
* Syntax for 2-ports: .net v(out_node) VINAC
* ------------------------------------------
.NET  VINAC 
* 
* These are the real (ZR) and imaginary parts (ZI) of input impedance (ZIN) :
* -------------------------------------------------------------------------
*measure ac  ZR   FIND  ZIN(R) AT = 'pfreq'   (removed / see below for "res_io") 
.measure ac  ZI   FIND  ZIN(I) at = 'pfreq'
*
*   ZIN = ZR + j x ZI  (j = sqrt(-1))
*   =================
*    so we have: j x ZI = 1/(j x omega x Cin) -->  ZI = -1/(omega x Cin)
* 
*     ---> Cin = abs (1/(omega x ZI)),    where omega = 2 x pi x f
*     ---> Cin = abs (1/(2 x pi x f x ZI))
*
.meas here_is_c_comp_and_r_in: param = 1
.meas ~~~~~~~~~~~~~~~~~~~~~~~  param = 1
.measure ac c_comp  param ='abs(1.0/(2.0*pi*pfreq*ZI))'  $ value of C_comp
.measure ac res_io  FIND ZIN(R) AT = 'pfreq'
********===============================================================********

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Received on Wed Mar 2 09:57:42 2005

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