[IBIS-Users] ODT topics

From: <Radovan.Vuletic_at_.....>
Date: Fri Apr 01 2005 - 06:50:13 PST
Hi,

recently I have took responsibility for IBIS models in Memory Products of Infineon and soon I have realised that it is very tricky. 

There were generated some ODT IBIS models (for DDR2  with thevenin impedance, not possible to separate Pull-up and Pull -down impedance) with s2ibis2 as Inputs with Power and Ground Clamps curves. Everything was OK until first customer were complaining that during his simulations our ODT behave other than comparing to Samsung and Micron ODT's. After some 5-6 hours of frustrating analysis we have discovered that the "only" problem is that neither the clamp curves are cut where they reach zero nor they are extrapolated  horizontally to 2*Vcc. As soon as we done that (cutting at zero current and extrapolating to 2*Vcc) everything was OK. By the way, Mr. Muranyi has nicely explained this procedure in his paper "Modeling on-die terminations in IBIS (without double counting)". The problem that we have experienced is obviously because of double counting of some data.

My question would be: what are simulators (e.g. HSPICE) really doing with IBIS models (specially with Input models), how are data treated, what is the algorithm of calculation (if designer was aware of this algorithm double counting could be perhaps avoided)? Is it possible to get this things written in electronic form or anywhere on Internet? 

By the way, on IBIS summit Meeting in Munich in March (DATE 2005) somebody mentioned something about some Cookbook for ODT's. Is there any estimation when will this Cookbook appear?

Many thanks in advance for any help or advice,
Radovan Vuletic

Infineon Technologies AG
MP PD PDE
Room 03.911
Balanstraße 73
D-81541 München

Phone:		+49 (0)89 234 20108
Fax:		+49 (0)89 234 27705
Fax (PC):	+49 (0)89 234 955 5305 

E-mail: radovan.vuletic@infineon.com

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Received on Fri Apr 1 06:50:22 2005

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