RE: [IBIS-Users] IBIS load

From: Tom Dagostino <tom_at_.....>
Date: Tue Dec 05 2006 - 00:12:09 PST
The load that is seen by a driver is first of all the trace on the circuit
board.  Usually trace impedance is in the 40 to 65 Ohm range.  Thus the IBIS
model should characterize the buffer driving the load that is expected to be
seen by the driver.  

In your case the waveforms are relatively slow, even when the buffer is
terminated in 50 Ohms.  I assume your 10 nsec rise and fall times were
measured without any capacitance at the load.  If you simulated with a C
load then you will likely have simulations issues in actual circuits.  If
the buffer is really 10 nsec, then you will start seeing SI issues only
after about 2 nsec trace lengths or about 12 inches on the board.  The only
parts we see these days with such slow edge speeds are RS232 typ drivers.

In this case the manufacturer has characterized the prop delay of the buffer
when it is driving a 1.5K load terminated to Vdd.  The timing is measured at
Vmeas.  If there was any C associated with the timing test load it would be
included along with the timing test resistor.  Also, in a real application
of this buffer with a 1.5K pullup there will be relatively low currents
flowing and slow edges at the load but the transition at the output of the
buffer will be faster.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com 
www.teraspeed.com 

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

-----Original Message-----
From: owner-ibis-users@server.eda.org
[mailto:owner-ibis-users@server.eda.org] On Behalf Of NG,MEI-YEE
Sent: Monday, December 04, 2006 9:55 PM
To: tom@teraspeed.com; Lynne D. Green; ibis-users@server.eda.org
Subject: RE: [IBIS-Users] IBIS load


Hi Tom,

Thanks for clarifying this. One more question, what is the difference
between the manufacturer's suggested pullup load resistor used in V-T values
extraction and the Rref value specified? In my case, the suggested pullup is
1.5KOhm, so I only need a 50 Ohm V-T table and my Rref = 1.5Kohm? 

Thank you very much.

Best regards,
Mei Yee
SID, Avago Technologies (Malaysia)
Tel no.:604-6108515

-----Original Message-----
From: Tom Dagostino [mailto:tom@teraspeed.com] 
Sent: Tuesday, December 05, 2006 12:17 PM
To: 'Lynne D. Green'; NG,MEI-YEE; ibis-users@server.eda.org
Subject: RE: [IBIS-Users] IBIS load

Lynne

The 50 Ohm pullup does the trick for "biasing control" of the buffer. There
is no need for the 1.5K.  

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com 
www.teraspeed.com 

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

-----Original Message-----
From: owner-ibis-users@server.eda.org
[mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green
Sent: Monday, December 04, 2006 7:56 PM
To: 'NG,MEI-YEE'; ibis-users@server.eda.org
Subject: RE: [IBIS-Users] IBIS load


Hello, Mei-Yee,
 
The 1.5K resistor is needed for bias control for an open-source/open-sink
buffer.  In addition to that resistor, one needs a V-t load (the 50 ohms you
refer to).  The 50 ohm load is described in the IBIS Cookbook,
http://www.vhdl.org/pub/ibis/cookbook/cookbook-v4.pdf.
 
This means your simulation will have both resistors: the 1.5K and the 50
ohms.
 
Once you have completed your model, please feel welcome to submit your model
to the IBIS Model Review Committee, http://www.eigroup.org/ibis/support.htm.
 
Best regards,
Lynne
 
 
 
"IBIS training when you need it, where you need it."
 
Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com
 
 



________________________________

	From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of NG,MEI-YEE
	Sent: Monday, December 04, 2006 5:28 PM
	To: ibis-users@eda.org; ibis-users@eda.org
	Subject: [IBIS-Users] IBIS load
	
	

	Hi experts,

	 

	According to the cookbook, when extracting V-T data, it is
recommended to use a load circuit of 1R + 1F into manufacturer's suggested
pullup resistor termination and voltage. However, when I use the suggested
pullup resistor (1.5K), the rising waveform takes up to 100ns to stabilize,
but the falling waveform requires less than 10ns. This creates inaccuracy
due to the resolution of the points (when I use 100ns simulation time). In
the IBIS model, I also included a waveform for 50Ohm pullup resistor (as
recommended by cookbook). The rising waveform for this is also within 10ns.
I wonder if I can generate IBIS model with ONLY 50 Ohm pullup because the
resolution is more appropriate in this case? I have verified this model and
the simulation shows acceptable waveforms.

	 

	Kindly advice whether it is a MUST to have a 1.5K pullup resistor
V-T table.

	 

	Thank you.

	 

	Best regards,

	 

	Mei Yee Ng

	IC Design Engineer 

	Illumination and Color Management

	Solid-state Illumination Division

	Avago Technologies Malaysia

	Tel no: +604-6108515

	 



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Received on Tue Dec 5 00:12:21 2006

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