[IBIS-Users] RE: [IBIS] How to decide on simulation time.

Hello Shrikant

It depends when the rising or falling get to the steady state level (DC
levels). Try to reduce the time to minimum in order to get good sampling
of the curve.

You can start with initial guess of 1*bit_time but if you get error or
warning about mismatch between V(t) and I(v) you will need to rerun and
use longer time.

  

Itzik Peleg, Senior Signal Integrity Engineer
Marvell Israel Ltd.

Web site:  http://www.marvell.com 
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-----Original Message-----
From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On
Behalf Of Shrikant G Kadadevar
Sent: Tuesday, March 04, 2008 11:30 AM
To: ibis-user; ibis
Subject: [IBIS] How to decide on simulation time.

Hello All,

Please can you help me to know, how we come to conclusion on the maximum

simulation time.
Should this value depends on frequency.
Suppose if i have 100MHz frequency buffer what must be maximum 
simulation time.
Should the value be equal to 1/100MHz or  1/(2*100MHz).
Or should it be independent.


Thanking you
Shrikant GK


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