RE: [IBIS-Users] load line error

Hi Babid,

This error signifies   I-V and V-T Mismatch.  

For understanding the meaning of this error refer to 

                   IBIS Cookbook 4.0    Section 5.2.2   :  I-V and V-T
Matching

                      find this document at
http://www.eda-stds.org/pub/ibis/ver4.0/

 

Reasons could be of Incomplete VT waveform.  VT Waveform Might have not
captured initial stable point and final stable point.

            

The following document has discussed some common errors, their possible
causes and common solutions. Hope this will be helpful

            A Critique of IBIS Models Available For Download On the Web
- Part I.   Pages 13-14

          available @
http://www.vhdl.org/pub/ibis/summits/jan02/bell2.pdf

 

Thanks,

Muniswar

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Babid A
Sent: Wednesday, July 09, 2008 11:43 PM
To: ibis-users@eda.org
Subject: [IBIS-Users] load line error

 

Hi All,

 

I am getting following error when I run IBIS parser,

 

ERROR - Model drv_out: The [Falling Waveform] 
      with [R_fixture]=50 Ohms and [V_fixture]=2.5V
      has TYP column DC endpoints of  0.50V and  2.50v, but
      an equivalent load applied to the model's I-V tables yields
      different voltages (-0.59V and  0.63V),
      a difference of 89.46% and 153.09%, respectively.

 

I appreciate suggestions or documents to find the solution for this
problem.

 

Thanks,

-Babid.



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