To All:
The IBIS Open Forum will hold its fifth Asian IBIS Summit (Japan)
Meeting on November 15 in Tokyo, Japan.
The presentation submission deadline is moved up to November 1
due to meeting logistics. A list of planned presentations is
shown below.
JEITA (Japan Electronics and Information Technology Industries
Association) is the primary event sponsor with several companies
listed below acting as co-sponsors. The event will held at JEITA
headquarters in Tokyo.
Note that we are also holding two other Asian IBIS Summits:
Shenzhen, China Tuesday, November 9, 2010
Taipei, Taiwan Friday, November 12, 2010
Bob Ross
Teraspeed Consulting Group
Atsushi Ishikawa
JEITA EC Center
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ASIAN IBIS SUMMIT (JAPAN)
FOURTH CALL FOR
PARTICIPATION AND PRESENTATIONS
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A S I A N I B I S S U M M I T ( J A P A N )
Time/Date: Monday November 15, 2010, 13:00 to 18:00
Meeting starts at 13:30
Location: JEITA Headquarters
Ote Center Bldg. (new location for 2010)
1-1-3, Otemachi
Chiyoda-ku
Tokyo 100-0004
JAPAN
http://www.jeita.or.jp/english/about/location/index.htm
Content: Presentations and Discussions
Purpose: Solicit and Exchange IBIS Model Related Information
and Ideas.
Organizational Sponsors:
Japan Electronics and Information Technology Industries
Association (JEITA)
IBIS Open Forum
Co-sponsors (in alphabetical order):
ATE Service (Sigrity), Cadence Design Systems, and Zuken
Cost: FREE, including refreshments
Contact us for details regarding sponsorship
BACKGROUND
This year we holding the fifth Asian IBIS Summit (Japan) meeting.
meeting. Several high-technology Japanese companies operate in Tokyo
and are affiliated with JEITA and IBIS.
Our objective is to reach out internationally to communicate with
the local experts and to learn of regional concerns.
CONFERENCE LANGUAGE
The conference language is English, but we will plan for technical
translations in English and in Japanese. Presenters may deliver in
Japanese, but the presentation slides should be in English.
IBIS SUMMIT
This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations will be archived in an electronic format on our Summit
site, and meeting minutes will be issued. However no formal decisions
requiring votes will be planned.
CALL FOR PARTICIPANTS
People involved in IBIS model development, EDA tool development and
digital circuit design are invited to participate in the Summit
meeting. If you plan to participate, please register with the
information below:
Name:
E-mail address:
Company:
Top-level Web Link:
Country:
Telephone:
Send to BOTH:
Bob ROSS, Teraspeed Consulting Group bob@teraspeed.com
Atsushi ISHIKAWA, JEITA EC Center a-ishikawa@jeita.or.jp
SIGNUP DEADLINE: November 10, 2010
Because of limited space, advance registration is required.
CALL FOR PRESENTATIONS
We are seeking presentations from individuals who have IBIS
experiences or issues. Presentations from Asia are encouraged/
Presentation Format: LCD Projection from meeting laptop computer
Time: 15-30 Minutes including questions
Electronic Archival: All presentations will uploaded to our public
IBIS Summit archives
Electronic Format: Microsoft PowerPoint or Adobe PDF
Presentation Copies: Available at the meeting for all attendees
PRESENTATION DEADLINE: November 1, 2010 to produce meeting copies
If you plan a presentation, please ADD to the above registration
information:
Title of Presentation:
Estimated Time:
(30 minutes or less)
We will notify you of acceptance and may follow up with questions
when we form the program agenda.
Note: Vendor promotional or business information is prohibited.
We review all submitted presentations and may request modifications.
Submissions from Asia are encouraged.
AGENDA (Tentative)
13:00 Sign in Asian IBIS Summit (Japan)
13:30 Presentations
15:30 Refreshments
15:45 Presentations
18:00 End of Meeting
The specific agenda is being developed. We expect seven or eight
presentations covering a range of issues from customer experiences,
technical clarifications, and some of the future directions in IBIS.
Tentative Program Titles and Topics:
Toshiba I.S. Corporation
IBIS Quality Framework
Flextronics and Cadence Design Systems:
Extending/Leveraging IBIS Constructs to Model High-Speed I/Os
and Packages using AMI, Spice, and S-Parameters
Intel Corporation:
IBIS-ISS: What Is It and What It Means to You
Cadence Design Systems, Sigrity, and Fujitsu VLSI Limited:
Model Connection Protocol Extensions for Mixed Signal SiP
Zuken
First Experiences in Dealing with ICEM (IC Emission Models)
or
Size Matters - Recent Experiences with IBIS Files
Teraspeed Consulting Group
IBIS Projects and Activities topic
ATE Service (Sigrity)
To be determined
LIST OF NEARBY HOTELS AND TRAVEL RULES
Hotels in all price ranges can be found through internet searches.
JEITA headquarters is located near the Tokyo Station (click image):
http://www.jeita.or.jp/english/about/location/index.htm
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-- Bob Ross Teraspeed Consulting Group LLC Teraspeed Labs 121 North River Drive 13610 SW Harness Lane Narragansett, RI 02882 Beaverton, OR 97008 401-284-1827 503-430-1065 http://www.teraspeed.com 503-246-8048 Direct bob@teraspeed.com Teraspeed is a registered service mark of Teraspeed Consulting Group LLC -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993Received on Tue Oct 26 09:46:57 2010
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