adding: VHDL-AMS element library, SMASH test/ (stored 0%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_MIN_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_ABS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_MULT_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_MULT_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_L_test.nsx (deflated 63%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_PWL_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_MIN_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCL_test.pat (deflated 43%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CECVS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_Delay_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCL_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_I_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCC_test.pat (deflated 43%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_Delay_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_SUM_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CECCS_PWL_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_IO_test.nsx (deflated 70%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCC_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_ABS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_SUM_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_C_test.nsx (deflated 63%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCR_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_IO_OPENSOURCE_test.pat (deflated 46%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_DIV_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_T_test.nsx (deflated 65%)
  adding: VHDL-AMS element library, SMASH test/IBIS_IO_test.pat (deflated 48%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_SUM_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_TCVS_PWL_test.nsx (deflated 64%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VECVS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_DIV_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_K_test.pat (deflated 50%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CECVS_PWL_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_MULT_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_ABS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_OPENSOURCE_test.nsx (deflated 70%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_SUM_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_MIN_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCR_test.nsx (deflated 65%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_MULT_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_MAX_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_TCCS_PWL_test.nsx (deflated 64%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_Delay_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_L_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCC_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_MIN_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_T_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CECCS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_SUM_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_SUM_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_IO_OPENSINK_test.nsx (deflated 70%)
  adding: VHDL-AMS element library, SMASH test/IBIS_INPUT_test.nsx (deflated 67%)
  adding: VHDL-AMS element library, SMASH test/IBIS_3STATE_test.nsx (deflated 70%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_MIN_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_V_test.nsx (deflated 64%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VECCS_PWL_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_DIV_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_PWL_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_IO_OPENSINK_test.pat (deflated 45%)
  adding: VHDL-AMS element library, SMASH test/IBIS_OPENSINK_test.nsx (deflated 69%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_MIN_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_ABS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_PWL_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_Delay_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_C_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_3STATE_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_PWL_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VECVS_PWL_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_MIN_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_SUM_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_IO_OPENSOURCE_test.nsx (deflated 70%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_MAX_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_Delay_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_ABS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_DIV_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCL_test.nsx (deflated 65%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_Delay_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_OUTPUT_test.nsx (deflated 70%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_INPUT_test.pat (deflated 42%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_MAX_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCC_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_MULT_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCR_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCL_test.nsx (deflated 65%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_MIN_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_MAX_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_SUM_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_DIV_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_OPENSOURCE_test.pat (deflated 46%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VECCS_PWL_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_DIV_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_MULT_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_MULT_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_ABS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_MAX_test.nsx (deflated 68%)
  adding: VHDL-AMS element library, SMASH test/IBIS_OPENSINK_test.pat (deflated 46%)
  adding: VHDL-AMS element library, SMASH test/IBIS_TCVS_PWL_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCR_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_DIV_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCVS_Delay_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_R_test.nsx (deflated 64%)
  adding: VHDL-AMS element library, SMASH test/IBIS_I_test.nsx (deflated 64%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_MAX_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_MULT_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_DIV_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCVS_ABS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_OUTPUT_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_ABS_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_Delay_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_R_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ (stored 0%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/IBIS_macro_library.EDU (deflated 95%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/IBIS_macro_library.FULL (deflated 95%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_GND_IO_OPENSOURCE_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/lab_1_od33v_t.txt (deflated 72%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_Vcc_IO_data.txt (deflated 81%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/No_ODT_IO_OPENSOURCE_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_VccGND_IO_OPENSOURCE_data.txt (deflated 81%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_VccGND_IO_OPENSINK_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_VccGND_IO_data.txt (deflated 82%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/lab_1_io50v_t.txt (deflated 71%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/lab_1_os33v_t.txt (deflated 70%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_Vcc_IO_OPENSOURCE_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/No_ODT_IO_OPENSINK_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_GND_IO_OPENSINK_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_GND_IO_data.txt (deflated 81%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/MacroLib_functions.vhd (deflated 90%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/IBIS_macro_library.vhd (deflated 95%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/No_ODT_IO_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/Macro_Lib/ODT_to_Vcc_IO_OPENSINK_data.txt (deflated 80%)
  adding: VHDL-AMS element library, SMASH test/IBIS_TCCS_PWL_test.pat (deflated 49%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_test.nsx (deflated 66%)
  adding: VHDL-AMS element library, SMASH test/IBIS_K_test.nsx (deflated 67%)
  adding: VHDL-AMS element library, SMASH test/IBIS_V_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_VCCS_MAX_test.pat (deflated 44%)
  adding: VHDL-AMS element library, SMASH test/IBIS_CCCS_MAX_test.nsx (deflated 68%)