============================================================================== IBIS INTERCONNECT TASK GROUP Mailing list: ibis-interconnect@freelists.org ============================================================================== Attendees from April 15, 2026 Meeting (* means attended at least using audio) Chipletz Stephen Newberry* Intel Corp. Michael Mirmak* MathWorks Walter Katz* Siemens EDA Weston Beal, Arpad Muranyi*, Randy Wolff* Synopsys Ted Mido, Edna Moreno ============================================================================== Michael Mirmak called the meeting to order. No patents were declared. Michael reviewed the March 11 minutes. No comments were received. Arpad Muranyi moved to approve the minutes; Randy Wolff seconded. The minutes were approved without objection. Michael reviewed the March 25 minutes. No comments were received. Arpad moved to approve the minutes; Randy seconded. The minutes were approved without objection. During the AR review of the March 25 minutes, Arpad noted that he may have misunderstood the assignment given him. He wrote and sent to the reflector a summary but not a clarification. Michael shared a brief presentation. He suggested that the wildcard * referred to globbing and shorting in different contexts, and that the two were not the same. Arpad replied that globbing references means shorting them. The presentation conflicts with pp. 410-420 of IBIS 8.0. The term "reduced" in reference to a single terminal implies a short, but similar statements on page 410 may conflict with this ("not necessarily physical shorts"); it refers to modeling. In real life, the same pads on different chips wired together are not ideal shorts, but are treated as such for modeling purposes. Randy agreed; the wildcard should be treated as an electrical short for model simplicity. Walter Katz noted that this was a big discussion point for AC vs. DC analysis in the IBIS-ATM meeting. In S-parameters, there is always a local ground and we document where it is. These may be shorted together on pad side, etc. but it is still just a location for measurement. You only need one ground pin in that case, or you can have lots of references. For IBIS-ISS, if you are concerned about current going through all the ground pins, you care about the accounting of the rail currents going to return the ground (for DC analysis). You just need a local reference for each signal pin; whether they are shorted doesn't matter. Michael asked whether the other IBIS specifications ever use the * character as a glob but NOT as a short. Arpad replied that wildcards only exist in EMD under IBIS; no place else. These are always in reference to a short (see pp. 410 and 420 of IBIS 8.0). For EMD, the wildcard means a short; Port Mapping is currently ambiguous. Randy asked whether we want wildcards in non-EMD circumstances. We don't have to support it. Randy added that the wildcards are used specifically in simulation cases. Arpad agreed, adding that, for modeling purposes, we are shorting locations together. Michael asked whether, per Randy's question, we want to use wildcards anywhere outside EMD in Port Mapping. Arpad replied that we are not matching what is in EMD or IBIS Interconnect; we are just telling tools and model-makers how to make connections. Randy added that, if Data_usage is EMD, we are covered; if we are outside EMD, that's where we have a problem. Arpad replied that Port Map states explicitly how to make connections. Michael asked whether glob-shorts must occur on both sides of the connection: Port Mapping and EMD. Randy replied that this applies to every designator with a certain Bus Label. It's the most simplified model you can imagine, but is not useful in most contexts. You have one port in your Touchstone file and it's the one port for VSSQ for every RefDes on the PCB. Arpad suggested imagining we have one port, and it powers all dies. You say *.1, *.2, *.3, etc. to indicate that we have one port for all those die pads. Same wildcard on both sides. Michael asked whether a rule is needed to forbid mismatches in * usage on both EMD and its connected Port Mapping. Walter disagreed, stating that the simplest case is to use 0, except in DC analysis. Walter had earlier sent an email showing the algorithm for a PIM or SPIM model mounted on the board to show how the terminals would be connected together. They don't have to match. Randy added that IBIS only checks that the Touchstone file has the right number of ports for the EMD. Otherwise there is zero checking. Michael suggested that the Touchstone port map in a given model has to match what the EMD for the same model has. Arpad corrected this: the port map *creates* the EMD model. Michael answered that, therefore, the modeling process begins with the Touchstone definition, from which an EMD in an IBIS file is created. Randy agreed, stating that this is the ideal flow. Michael addressed each of the remaining issues from his presentation in turn. For Issue 1, he asked whether the "Y" in X.Y is always a pin. Randy suggested that test points, connectors, etc. can use numerical or alphanumerical names. Arpad noted the example of a resistor's terminals R1.1, R1.2; all components have at least one pin. This notation applies to any part except a test point (TP.1, TP.2, etc.). Randy added that pin number is really a pin name (a set of alphanumeric characters). Randy noted that U1.GND is a Bus Label, meaning that Example 12 is incorrect. It should instead be in the format Bus_label.designator.name. Michael asked how we knew that. Arpad added that it was an issue raised in his e-mail to the reflector with his summary of rail connections. Michael replied that, even if we correct the examples, we need to know whether this syntax is allowed. Randy asked whether the Physical declaration is coming from a non-Data_usage context. Michael replied that one issue is that "RefDes" is not the same as dot-syntax. The latter is more general, and includes more than two levels (and two dots). Michael took the AR to describe dot-syntax more completely in the text (RefDes.pin_name is useful; see EMD Data_usage as an example of that). [AR] Randy noted that, if this is EMD-like (not EMD), then we should be using something other than GND. Michael replied that a pin called "GND" is consistent and legal with this syntax. Arpad suggested having a universal rule that the things after the dot cannot be pin names. Signal names or bus label names after the dot were assumed, but the possibility of pin_name was forgotten. Example 11 uses Group:. Arpad suggested that we could use Bus_Label: instead. Randy noted that Bus_label is the equivalent of Group in Port Mapping. Actual EMD structures do not use Group. Arpad added that the * character could happen on the Port line, which could eliminate the need to use Groups. If the only difference is the RefDes portion, you can handle it on the Port lines individually. Otherwise, you can use Group to list all the pins. Randy suggested that we should correct the examples, but why did we put Group in for EMD when Bus_label does the same thing? Arpad replied that Group can have a more flexible list of pins than Bus_label. He asked whether the ":" character should be used instead of the "." character. Also noted, in this context (EMD & Port Mapping), the glob wildcard means shorting (referring to a group of things is only for the purpose of shorting them together). Arpad moved to adjourn; Randy seconded. The meeting adjourned without objection.