============================================================================== IBIS INTERCONNECT TASK GROUP Mailing list: ibis-interconnect@freelists.org ================================================================================ Attendees from November 20, 2024 Meeting (* means attended at least using audio) ANSYS Curtis Clark, Juliano Mologni Arista Networks Jim Antonellis Broadcom James Church Intel Corp. Michael Mirmak*, Xiaoning Ye Keysight Technologies Ming Yan Marvell Steve Parker MathWorks Walter Katz* Micron Technology Justin Butterfield Siemens EDA Weston Beal*, Arpad Muranyi*, Randy Wolff Simberian Yuriy Shlepnev ST Microelectronics Aurora Sanna Synopsys Ted Mido, Edna Moreno University of Illinois Jose Schutt-Aine Zuken USA Lance Wang Michael Mirmak called the meeting to order. No patents were declared. During the review of the November 13 minutes, Michael noted an error in the sentence, "Arpad Muranyi noted that is AR was completed" ("is" should be "his"). Arpad Muranyi moved to approve the minutes with this change; Walter Katz seconded. The minutes were approved without objection. During AR review, Arpad and Weston Beal noted that their AR had been closed, as they had provided updated examples, to be shared during the meeting. One AR was still open, to Randy Wolff, regarding an IBIS Interconnect example relating the pins and reference designators corresponding to the drawing in the IBIS specification (an EMD example exists). During Opens, Arpad noted that the references for I-V tables could be clarified. Should this be handled be handled in the Editorial Task Group? IBIS-ATM? Michael suggested bringing it up at least in IBIS-ATM. Michael suggested assembling a list of individual tasks for both Editorial and Interconnect Task Groups to handle between the IBIS and Touchstone documents. Arpad also noted that C-PHY had been discussed particularly by Intel personnel in IBIS-ATM. Should this be un-tabled? Walter suggested that the team take C-PHY off the active working list unless there is a specific problem or proposal. The team discussed C-PHY applications. Arpad showed his and Weston's slides regarding a specific referencing example. They are running simulations and generating waveforms to examine referencing effects. They happen to have a structure in-house that perfectly matches the use case needed. The example consists of four conductors on a package, routing traces from the BGA to die pads, with VSS and VDD rails and a differential data pair. One change made was to *not* VSS as a reference for the other signals and rail, but to use instead an additional piece of metal at die pads and also at the BGA balls as the reference. These are floating (not connected to each other or other metal in the structure). Weston suggested that "external" is a better phrase to use, given that "VSS" is now just another signal. Arpad suggested that these will be tied to node zero for circuit simulation. Michael noted that there is a distinction between nodes, ports and physical access points vs. what is shown in blue in the drawing. Weston replied that, again, "floating" is not appropriate as a term. Some measurement setups allow this physical structure to be probed. Arpad replied that the plotted S-parameters look wrong because the local references are "floating" with respect to each other. Walter added that he did not see any return paths connecting the two. Weston noted that the two green areas are not connected, but that each area is a common reference for its four local connections. Arpad mentioned and showed a second example with an inductor in the pin side of the circuit to "make the waveforms more interesting". Walter asked how one would measure this structure. Weston agreed with the spirit of the question - one cannot make measurements of what is shown. Arpad noted that the example simulations use a driver in IBIS format, with an S-parameter connected in-between; node zero would be used for the buffer side and also for measurement of waveforms in the plot. Michael asked whether the IBIS connections involve node zero. Weston suggested that this is not usually explicit. Now we are explicitly stating this connection. There is no node zero in IBIS, except non-split C_comp, possibly. Michael observed that the IBIS schematic for this setup is totally misleading and therefore useful as a teaching tool. IBIS diagrams use of ports vs. terminals (nodes) is confused, as the reference node is incorrect; IBIS VSSQ connection is not the same as the reference point. Weston noted that representing ports as a single node years ago confused this point; we need to get away from this. A port has two terminals. Arpad added that the deltas are what matters in both the drawing and the schematics (for potential differences). Walter suggested that, if one is making a model for J1 at Port 7 and U1 at VSSQ, both of these must share a reference. Michael suggested that Yuriy Shlepnev's and Scott McMorrow's connection plane ideas should be discussed and used. Walter noted that IBIS has reference node zero in many places in the documentation. Arpad stated that RS-232 was the case that pullup_ref, etc. was meant to describe. Walter responded that, if you are making ports where the reference is not a local ground, then you may get into trouble. We should follow the convention regarding use of a local ground as a refernece, which is equivalent to node zero in most simulators. Arpad moved to adjourn the meeting. Weston seconded. The meeting adjourned without objection. The next meeting will be held December 4, 2024 due to intervening US holidays. ================================================================================ Bin List: 1) Complete port naming proposal (Katz et al) 2) Complete/revise Touchstone 3.0 draft outline (Mirmak) 3) Complete ISS-IRD 1 Draft - enable cascading of S-parameters through W-element (Mirmak) - TABLED Tabled ARs: - Arpad to give an example of the physical connectivity needed for EMD automation.