************************************************************************** ******************* IBIS GOLDEN PARSER BUG REPORT FORM ******************* ************************************************************************** INSTRUCTIONS To report a bug in the IBIS golden parser. Please fill out the top part of the following form and send the complete form to info@ibis.org. A list of reported bugs is maintained at http://ibis.org/bugs/ibischk/ . ************************************************************************** PARSER VERSION NUMBER: 7.1.0 PLATFORM (SPARC, HP700, PC, etc.): PC OS AND VERSION: Microsoft Windows 10 Enterprise REPORTED BY: Michael Mirmak, Intel Corp. DATE: January 28, 2022 DESCRIPTION OF BUG: Error message references illegal and absent IBIS models In an IBIS file containing [Clock Pins] associated with [Diff Pin]s and [Model Selector]s combining several Model_types, the IBISCHK7 parser is incorrectly identifying the contents of the [Model Selector]s as including forbidden Model_types. [Clock Pins] cannot legally be associated with Series, Series_Switch, or Terminator models, but are perfectly legal when associated with I/O, Input, or Output models. [Clock Pins] is also explicitly legal in association [Diff Pin] and [Model Selector]. In this instance, no Series, Series_Switch, or Terminator models are present anywhere in the file, yet the parser is identifying some. The problem does not appear to be associated with any one Model_type, or the use of mixed Model_types; nor is the problem caused by [Diff Pin]. The parser instead seems to have difficulty with any [Model Selector] association with [Clock Pins]. The results of running ibischk7 with the -caution flag are shown below. IBISCHK7 V7.1.0 Checking bug230.ibs for IBIS 7.1 Compatibility... E6309 - Component 'BUG230': Clock Pin D77 is associated with a Model Selector 'DQS' whose models are of type Series, Series_Switch or Terminator E6309 - Component 'BUG230': clocked_pin B81 is associated with a Model Selector 'DQ' whose models are of type Series, Series_Switch or Terminator E6309 - Component 'BUG230': Clock Pin D77 is associated with a Model Selector 'DQS' whose models are of type Series, Series_Switch or Terminator E6309 - Component 'BUG230': clocked_pin B79 is associated with a Model Selector 'DQ' whose models are of type Series, Series_Switch or Terminator E6309 - Component 'BUG230': Clock Pin D77 is associated with a Model Selector 'DQS' whose models are of type Series, Series_Switch or Terminator E6309 - Component 'BUG230': clocked_pin M77 is associated with a Model Selector 'DQ' whose models are of type Series, Series_Switch or Terminator Errors : 6 File Failed INSERT IBIS FILE DEMONSTRATING THE BUG: |*************************************************************************** | [IBIS Ver] 7.1 | [File Name] bug230.ibs [Date] January 28, 2022 [File Rev] 0.5 | |*************************************************************************** [Component] BUG230 [Manufacturer] Demo [Package] | typ min max R_pkg 0.000m 0.000m 0.000m L_pkg 0.000nH 0.000nH 0.000nH C_pkg 0.000pF 0.000pF 0.000pF | |*************************************************************************** [Pin] signal_name model_name | B81 DDR0_DQ[0] DQ B79 DDR0_DQ[1] DQ M77 DDR0_DQ[2] DQ B77 DDR0_DQS_DN[0] DQS D77 DDR0_DQS_DP[0] DQS | A1 A1 DQ_IO B1 B1 DQ_IO | |*************************************************************************** | [Clock Pins] clocked_pins relationship | A1 B1 Unspecified | Data pin B1 uses clock information from | | Pin A1 | | DQ/DQS associations | D77 B81 Unspecified | DDR0_DQ[0] D77 B79 Unspecified | DDR0_DQ[1] D77 M77 Unspecified | DDR0_DQ[2] | |*************************************************************************** | [Diff Pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max | D77 B77 NA NA NA NA | DDR0_DQS_DP[0] DDR0_DQS_DN[0] | |*************************************************************************** | [Model Selector] DQS | this group is created solely to avoid IBISCHK | | Warnings | DQS_IO IO model DQS_OUT output model DQS_IN input model | |*************************************************************************** | [Model Selector] DQ | DQ_IO IO model DQ_OUT output model DQ_IN input model | |*************************************************************************** | [Model] DQ_IO Model_type I/O | C_comp 0 0 0 | Vinl = 0.2 Vinh = 0.8 Vmeas = 0.5 Vref = 0.5 Rref = 50.000Ohm | | typ min max [Voltage Range] 1.0 1.0 1.0 | [Pulldown] -1.0 -1.0 -1.0 -1.0 0.0 0.0 0.0 0.0 2.0 2.0 2.0 2.0 | [Pullup] -1.0 1.0 1.0 1.0 0.0 0.0 0.0 0.0 2.0 -2.0 -2.0 -2.0 | [Ramp] dV/dt_r .588/68.408p .588/87.589p .588/49.617p dV/dt_f .588/68.345p .588/87.177p .588/49.63p | |*************************************************************************** | [Model] DQ_OUT Model_type Output | C_comp 0 0 0 | Vmeas = 0.5 Vref = 0.5 Rref = 50.000Ohm | | typ min max [Voltage Range] 1.0 1.0 1.0 | [Pulldown] -1.0 -1.0 -1.0 -1.0 0.0 0.0 0.0 0.0 2.0 2.0 2.0 2.0 | [Pullup] -1.0 1.0 1.0 1.0 0.0 0.0 0.0 0.0 2.0 -2.0 -2.0 -2.0 | [Ramp] dV/dt_r .588/68.408p .588/87.589p .588/49.617p dV/dt_f .588/68.345p .588/87.177p .588/49.63p | |*************************************************************************** | [Model] DQ_IN Model_type Input | C_comp 0 0 0 | Vinl = 0.2 Vinh = 0.8 | typ min max [Voltage Range] 1.0 1.0 1.0 | |*************************************************************************** | [Model] DQS_IO Model_type I/O | C_comp 0 0 0 | Vinl = 0.2 Vinh = 0.8 Vmeas = 0.5 Vref = 0.5 Rref = 50.000Ohm | | typ min max [Voltage Range] 1.0 1.0 1.0 | [Pulldown] -1.0 -1.0 -1.0 -1.0 0.0 0.0 0.0 0.0 2.0 2.0 2.0 2.0 | [Pullup] -1.0 1.0 1.0 1.0 0.0 0.0 0.0 0.0 2.0 -2.0 -2.0 -2.0 | [Ramp] dV/dt_r .588/68.408p .588/87.589p .588/49.617p dV/dt_f .588/68.345p .588/87.177p .588/49.63p | |*************************************************************************** | [Model] DQS_OUT Model_type Output | C_comp 0 0 0 | Vmeas = 0.5 Vref = 0.5 Rref = 50.000Ohm | | typ min max [Voltage Range] 1.0 1.0 1.0 | [Pulldown] -1.0 -1.0 -1.0 -1.0 0.0 0.0 0.0 0.0 2.0 2.0 2.0 2.0 | [Pullup] -1.0 1.0 1.0 1.0 0.0 0.0 0.0 0.0 2.0 -2.0 -2.0 -2.0 | [Ramp] dV/dt_r .588/68.408p .588/87.589p .588/49.617p dV/dt_f .588/68.345p .588/87.177p .588/49.63p | |*************************************************************************** | [Model] DQS_IN Model_type Input | C_comp 0 0 0 | Vinl = 0.2 Vinh = 0.8 | | typ min max [Voltage Range] 1.0 1.0 1.0 | [End] **************************************************************************** ******************** BELOW FOR ADMINISTRATION AND TRACKING ***************** **************************************************************************** BUG NUMBER: 230 SEVERITY: [FATAL, SEVERE, MODERATE, ANNOYING, ENHANCEMENT] SEVERE PRIORITY: [HIGH, MEDIUM, LOW] HIGH STATUS: [OPEN, CLOSED, WILL NOT FIX, NOT A BUG] CLOSED FIXED VERSION: 7.1.1 FIXED DATE: November 18, 2022 NOTES ON BUG FIX: Classified at the Febrary 18, 2022 Open Forum Meeting The problem appears to be a coding mistake. No errors should be reported. To be fixed in the next release. **************************************************************************** ****************************************************************************