Re: Questions of Polarity and Enable

Good morning IBIS world,

The nessessity of having Enable and Polarity specified for the s2ibis
utilities is clear to me. However, I too was wondering why they are
required in the specs. It almost seems like unnesessary data to
require to be listed for all of the types of pins. It SHOULD be required
to specify the enable pin, IF the enable for an I/O is an external pin
itself; such with, it should also have its (the enable pin's) polarity
specified. But, if the enable is only available internally, why specify
it? And, if it is not specifically an external enable pin, why does the
pin's polarity matter to the simulation tools? Thanks,

-Scott Schlachter Actel Corporation
 scotts@actel.com Sunnyvale, CA

> Hi,
>
> If you are creating an IBIS model based on s2ibis utility, Polarity
> and Enable are key in making the conversion work.
>
> For Model_type Input, Polarity=1 sets the input for inverting while
> Polarity=0 for non-inverting.
>
> For Model_type I/O or 3-state, both Polarity and Enable fields are
> expected. Enable specifies the pin number that enables the associated
> output.
>
> Regards,
> Syed
> National Semiconductor Corp.
>
> >
> >
> > On Thu, 5 Dec 96 16:59:01 PST Zheng Shi of Symmetry wrote:
> >
> > >Hi, Ibis folks:
> > >
> > >Can anyone tell me what the sub-param Polarity and Enable of
> > >keyword [Model] really means? Is Polarity used only on diff
> > >pins? Is Enable used only on tri-state pins? How can I decide
> > >the Polarity and Enable of an input or output pin?
> > >
> > >I can't find such detail information from IBIS2.1 Specification,
> > >can anyone give me some advices, or tell me where i can find
> > >the answer?
> > >
> > >Thanks a lot,
> > >
> > >-Zheng Shi
> > > zheng@symmetry.com
> > > Los Altos, CA.
> >
> > I belive the original intent was to support SSI logic components
> > (74OO series TTL and the like) by allowing the user to include
> > information on the outputs' logic operation. For example, the model provider
> > could specify if the the path from input to output was inverting or
> > non-inverting or if the enable on a tri-state output pin was high or
> > low. However, for a lot of components (microprocessors, PALS/FPGAS, RAMS,
> > etc.) these parameters don't seem to make much sense (to me, anyway). Unless
> > you were modeling an SSI component where this made since, I would
> > just default them to positive polarity and Active_high.
> >
> > Ibis old-timmers, any other comments?
> >
> > Best Regards,
> > Stephen Peters
> > Intel Corp.
> >
> >
>
Received on Mon Dec 9 07:30:35 1996