Re: Rising Waveform Loading Effects

Brock Hannibal wrote:
>
> Hi all,
>
> Let me add a thought. Ed Boeckman asks:
>
> "I hope someone can help me to understand how the IBIS models will
> accurately produce the correct physical response with an arbitrary but
> realistic loading condition, different from the test fixture, at least
> to a level of accuracy close to that which would result from the
> original transistor level spice model, say within 5%."
>
> I've found that board level simulation accuracy is difficult to quantify
> as a percentage number. There are a number of contributing factors such
> as etch width and thickness variations along the length of the interconnect
> line, cross-section variations(dielectric thickness), dielectric constant
> variation with frequency, humidity, temperature, etc. Most FR-4 type boards
> are themselves about 10% components. Holding the boards to a tighter tolerance
> is both expensive and difficult.
>
> It turns out that if the IBIS model is derived into a nominal resistive
> load that is representative of the transmission line characteristic
> impedance that the dominant effect in the simulation is usually the
> transmission line formed by the interconnect.
>
> I have verified this by actual measurement in a number of cases. This is
> not to say that the model is irrelevant, only that the model's
> output impedance curves and risetimes are not as critical as one might
> think in predicting the performance of the system.
>
> Brock Hannibal
> Design Engineer
> Tektronix, Inc.

I must disagree with this statement. Though accurate transmission line
characteristics are crucial for simulation, risetime and IV curve
accuracy is also important. The IV curve vs line impedance directly
determines the incident wave height (and thus incident switching and/or
number of round-trips to switch) and crosstalk and overshoot are a
function of risetime/falltime as much as line coupling and impedance.

Jon Powell
Quad Design
Received on Mon Oct 28 15:50:53 1996