Sascha:
My mistake. I got the message earlier, but thought it was for
the ibis-users@vhdl.org reflector. Thus, no response.
I am forwarding it to the ibis-users@vhdl.org reflector for
additonal comments. I will give you a some general answers.
If people have any vendor-specific differences to my response,
please reply privately to Sascha.
Sascha, you described the crux of the ground/power
bounce problem in your memo. Your observations are correct.
With the information currently provided in IBIS, you have
to make some ASSUMPTIONS regarding which rails (ground and
power rails) supply the current used during the output
transitions. IBIS does not give any details for this.
Furthermore the "assumptions" are usually IMPLICIT, a
consequence of the internal vendor transition algorithms.
My example case is that there is no provision in IBIS
to describe a make-before-break transition mechanism
that might provide additional rail and ground currents
than needed just for the output alone.
However, to the extent that an IBIS model may still provide
you with a reasonable ball-park estimate, you can still
use IBIS models to provide a reasonable estimate of the
effects in this complicated problem. There are a lot of
other issues involved (simutaneous switching, allocation of
currents to various rails for multiple drivers, etc.)
The TTgnd and TTpower parameters were intended to provide
a hook so that the often undocument and unpublicized
"diode kick-back" effect could be modeled and included
in the analysis where applicable. The diode currents
COULD also be included in the power and ground bounce
analysis.
In my opinion, IBIS has some opportunity to address the
power/ground bounce problem to a reasonable level of accuracy,
but does not have all of the details that might be needed
for an analysis that compares "very" closely to a Spice
analysis or an actual part in SOME cases. I cannot
QUANTIFY any of the statements in this response.
Best Regards
Bob Ross
Inerconnectix
> Date: Fri, 21 Feb 97 15:20:25 +0100
> From: cornelia@thesys.de (Cornelia Foss)
> Message-Id: <9702211420.AA26474@s01.thesys.de>
> To: ibis-info@vhdl.org
> Subject: ground noise analysis with IBIS
> Status: RO
> Hello everyone,
> I sent out a message to ibis-info@vhdl.org but did not receive any
> response. To assure this mail made it through my system that might
> had some problems, I post it again. If you got it twice, please
> forgive. It is definitely NOT meant as a "reminder" for I know you
> provide this good support via ibis-info on your own time despite you
> are very busy as well.
> Thanks a lot,
> Sascha Pawel
> email: cornelia@thesys.de
> ********************original message*********************************
> Hello Bob,
> I'd like to thank you for the detailed response to my
> question regarding best test loads. The information
> was very useful and is highly appreciated.
> As test load recommendations of various simulator vendors
> do not differ that much I hopefully think results won't,
> too. Due to the high level of abstraction when generating
> IBIS models there is the risk of getting simulator dependent
> outcomes, but that risk seems to be lower than I expected.
> Looking though the reflector discussion and all BIRDs I found,
> I couldn't surely solve the following problem:
> When trying to perform ground noise analyses, one has to
> calculate the currents through each ground path of each driver.
> This could be approximately done by summing all output currents
> extracted from waveform tables. But the simulator will have to
> assign the current to pullup/down side of the driver, depending
> on the point of transition. Additionally, the current from VDD
> to GND has to be calculated and stored charges to be considered.
> My question is: Are these problems intended to be solved in IBIS
> and are there simulators that are capable of that. Further, if
> yes, will IBIS 3.0 rise enhancements, e.g. will the [TTgnd/pwr]
> keywords be used for ground/power noise analyses?
> I'm not quite sure such transition effects are ment to be modelled
> by IBIS but they are important for SI and hard to simulate with
> some 30 drivers in SPICE.(would be time saving in IBIS, even if
> not as accurate as SPICE)
> I'm very grateful you counseled me several times and I highly
> appreciated if you could do so, again.
> Much thanks in advance
> Sascha Pawel
> email: cornelia@thesys.de
Received on Fri Feb 21 11:14:08 1997
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