Hello All:
Mr. Singhal raises a good point, and I thought I'd respond.
In my experience the "min" and "max" process corners in a semicondutor
model (especially for the early version processes I deal with) could
be better labled "really, really min" and "absloluty, positivly,
completly max". These corners are usually so far out there
that a model built at those corners is unrealistic. By this I mean that
by the time a part is speced
and the useful yeilds determined the customer probably never ever sees
a truly "min" and "max" part. There is also the problem of having to
figure out how to correlate the parameters that are used in production
testing of a part (Tco, power dissipation, etc.) with the parameters an
I/O buffer model cares about (edge rate and drive strength). For
example, does the min and max Tco really correspond to min and max
drive strength? Given all that, one can resonable use an imperical
% derating factor to determine the corners of an IBIS model.
This is not to say that varying the process corners is not a
useful way to make min and max models. One just has to understand
that "min" and "max" process corners do not necesarly represent the
worst and best case I/O buffers the customer receives.
Best Regards,
Stephen Peters
Intel Corp.
> On Wed, 16 Jul 1997 03:48:15 -0500, Vipul K. Singhal wrote:
Hello all,
I have a doubt regarding the method for obtaining the curves
by simulation as outlined in IBIS COOKBOOK. The cookbook says ( under
the section 3.3.1 : "OBTAINING CURVES BY SIMULATION - Simulation
Specifics" ) that :
"For both the rise/fall time and I-V curve measurements,
use "typical" process parameters."
"For CMOS:
min = min VCC, max temperature, typ process parameters
---
max = max VCC, min temperature, typ process parameters"
---
Later it says that " To account for process variation, decrease the
current values taken at min conditions, increase the current values
taken at max, and derate the rise and fall time values by the
appropriate percentages. "
This seems to be a roundabout way of doing it. Why can't we
directly use "typ" , "min" , and "max" process parameters, as
appropriate, directly in the simulations ? For example, if SPICE is
used for simulation, we can have three different SPICE models for
transistors, corresponding to the process-variation corners. Why
should "typical" be used in each case ?
Regards,
Vipul K. Singhal
Texas Instruments
Received on Wed Jul 16 08:54:57 1997
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