Re: SPICE Convergence Tricks - Consequences?

Roland Chang asked:

> Many people mentioned that convergence problems are quite common, I would
> like to know how common are they?

Depends greatly on the semiconductor models, and on whose SPICE you
are using. Everyone gets them eventually.

> Furthermore, I am curious if anyone has a convergence fix that works
> everytime, as it seems tedious to try to get things to converge everytime
> just by trial and error fixes.

You will never find a magic fix that works every time. Well, I
suppose you could fully relax ABSTOL and the other *TOL parameters to
the point that SPICE just doesn't care about accuracy anymore; but
even then it might have convergence problems of a different nature.

There are all sorts of things lurking in SPICE simulations that cause
misconvergence. Some may be called bugs in SPICE itself, or in the
semiconductor model equations and algorithms (such as discontinuities
in the formulas). Others are artifacts of how we discretely sample a
continuous world, and how computers manipulate data.

Generally speaking, though, a few convergence tricks may work for most
problems you encounter with one set of semiconductor models. Now if
your simulations involve models from several different vendors, then
SPICE may keep you on your toes.

> Also, what kinds of side-effects, or problems (in terms of IBIS
> modelling) have people encountered by forcing the analysis to converge via
> fancy SPICE tricks?

A general observation, not specific to IBIS modeling: The results of
ANY SPICE simulation are never gospel. Whether you use no "tricks" or
you use several, the results are just as circumspect. Helping SPICE
converge can make its results more accurate, or less accurate.
(Relaxing ABSTOL by orders of magnitude probably does not make it more
accurate.)

I have had SPICE simulations that converged to the wrong result (off
by several volts!), when no "tricks" were used.

Some of these "tricks" are already built into SPICE itself. The SPICE
developers tailored its algorithms and parameters to give reasonable
results over a set of benchmark circuits they had. The small resistor
in series with voltage sources is already used by SPICE to aid convergence
when you force initial conditions via the .NODESET or .IC statements.

> One last question regards clarification about typ, min, and max
> curves. When one is generating curves for the typical case,
> suppose the typical case passes but both the min and max fail, the columns
> should read NA for min and max right? Now should I go back and try to
> tweak the min and max to converge? OR are some curves meant to only work
> for the typical case?

Min and max curves ought to represent the extremes of what your device
will do. If you can't get these by measurement or simulation, and you
care about having a model that shows those extremes, you need to
approximate, by whatever means possible.

If the best you can do is to shift the typ curves some amount,
up/down/left/right, it'll do.

Personally, I'd try to get the simulations to work. Maybe this
problem points to something fundamentally wrong with the models
themselves, which could make even the typ curves wrong.

Regards,
Andy Ingraham
 
Received on Wed May 21 05:57:47 1997