Pseudo-ECL output models

     
     Hi, all.
     
     For a communications serializer-deserializer high speed(1Gb/s) serial
     output IC, with the following configuration,(ignore the *star* line till
     you get to question 3)
     
      
                         *
            |------|-----*---------------------
> > * | |
            < < * | |/
            | |___C_*______|___________|
            | | * | |\
            | | * | |
            | | * |/ A____
            |______|___D_*_____| | |
            | | * |\ | <
            | | * | | >
          |/ \| * | | |
     -----| | * | | GND
          | | * B____________|________
          |\ /| * Current Current |
           | | * source Source |
           --------- * | | <
               | * | | >
               | * | | |
              Current * GND GND GND
              Source *
               |
               |
               GND
     
     Where A and B are the IC buffer boundary and the two resistors to
     ground are 150 ohms each from A and B,
     
     I am trying to generate an IBIS model. I have the following questions-
     
     1. For the pull-up and pull-down tables I get negative currents. I
     understand that for standard ECL outputs,currents are positive. Will this
     cause any simulation difficulties? ( For simulation, the buffer shown above
     is ac coupled to a transmission line and terminated differentially in 2*Z0)
     
     2. For generating the IBIS pullup/pulldown table, I bias the buffer in such
     a way that one of the outputs is "high"/"low" and the other is
     "low"/"high", with the 150 ohm resistors in place. Then on the output that
     is "high" a voltage is swept in steps while monitoring the current. Is this
     the correct way of generating the IBIS table?( Note that one leg of the
     differential outputs has only the 150 ohm resistor to ground while a
     voltage is connected to the other leg and is being swept while currents are
     being measured)
     
     3. For an output buffer structure that is shown on the left hand side of
     the vertical *star* line, with C and D as the differential output
     terminals, has any one come up with an IBIS model? This output structure
     is used for high speed buffers and the traditional way of generating the
     IBIS tables do not work.
     (This kind of structure is very useful in that in provides back termination
     for transmission lines without any external resistors and the biasing of
     the internal transistors is automatic) Again, typically, this buffer is ac
     coupled to a transmission line that is terminated differentially in 2*Z0
     for simulation.
     
     
      Answers, suggestions and questions are welcome. If this information exists
     somewhere please direct me to it. (I did not find it in the cookbook)
     
     Thanks.

 
Received on Fri Jan 9 15:31:06 1998