Great suggestions Weston.
I would like to add after performing syntax and various other sanity checks
I suggest you perform correlation between simulations and actual devices and
document those results (for you and your customer). The IBIS accuracy spec
(available on the IBIS web site http://www.eia.org/eig/ibis/ibis.htm) gives
some suggestions for loads and measurement techniques. I also commend you
for due diligence in creating useful models for your semiconductor
customers.
regards, bob
Robert J. Haller
Compaq Computer Corporation
AlphaServer Product Development
Phone: (978) 493-4112
Fax: (978) 493-0941
robert.haller@compaq.com
-----Original Message-----
From: Beal, Weston
Sent: Wednesday, October 20, 1999 1:58 PM
To: ibis-users@eda.org
Subject: RE: IBIS MOdel Question
Tony,
I commend you for at least checking your file with ibischk. I've received
IBIS files from part vendors and the file doesn't even pass the syntax check
when I get it.
The first thing I look for in a new IBIS file is the timing reference load
(Vmeas, Cref, Rref, Vref) on all drivers. Ibischk3 will issue warnings if
these don't exist. If your customer is doing simulation for timing they
will need this information.
The second test I run is to look at the waveforms. There are various tools
that will display your curves. In general, all the I-V curves should pass
through 0.0A, 0.0V or very close thereunto. Pullup and Pulldown curves
should be 0.0A through the normal operating voltage range.
Next, I would run an actual simulation with each of the drivers in the file.
It would be very impressive to your customer if you ran a simulation of your
models in the same simulator that they use.
If you did all that I would like to personally shake your hand and laud you
name across the internet!
Regards,
Weston Beal
-----Original Message-----
From: Tony Palmieri [mailto:apalmieri@cimaron.com]
Sent: Wednesday, 20 October, 1999 11:49 AM
To: ibis-users@eda.org
Subject: IBIS MOdel Question
<< File: Card for Tony Palmieri >> Hello,
I have a question about an IBIS model. I have created a chip
level model
that is composed numerous IBIS models. After I completed
the model I
ran the ibischk program and it passed. I will be providing
this model
to our customers, but want to make sure that it is filly
tested.
Are there any other tests that I should run to insure that
it is
correct. I have reviewed the pin assignments, and that
everything is
properly referenced.
Please reply to apalmieri@amcc.com
Thanks for your help,
Tony Palmieri
AMCC
Applications, IC Test and Verification Manager
Received on Wed Oct 20 12:31:45 1999
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