Hi Alan:
The 50 ohm load is a recommendation based on a "standard" CMOS buffer. If
you are specifically specing your drivers to work into a 60 ohm load, then
by all mean -- take the ramp and V-T waveform data into 60 ohms. It
definatly shouldn't make the model invalid or cause the simulator tool
problems, as long as the load resistance under which the [Ramp] and V-T is
taken is documented properly (the R_load and R_fixture subparmeters
respectivly).
Regards,
Stephen
-----Original Message-----
From: Alan Hilton-Nickel [mailto:ahilton@transmeta.com]
Sent: Friday, December 15, 2000 11:20 AM
To: Peters, Stephen
Cc: ibis-users@eda.org
Subject: Re: Rising/Falling waveform and Ramp keywords
"Peters, Stephen" wrote:
> Note that for a standard CMOS buffer the cookbook recomends including four
> waveforms: two rising, one with the buffer driving 50 ohms to VCC and
> another with the buffer driving 50 ohms to gnd, and two falling, same
> conditions. For more info, check out the IBIS cookbook at
>
Stephen,
I am a little uncomfortable with specifying a waveform into a 50 ohm
load, when we tell our customers to use a 60 ohm characteristic
impedance on their board. Would it screw the IBIS modeller up if we gave
a waveform into a 60 ohm load? I would think it would be more
representative (if not more accurate) of what the driver would see in
normal use.
Alan Hilton-Nickel
Transmeta Corp
Received on Fri Dec 15 11:43:28 2000
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