RE: confusion about c_comp

> I think I might have used the wrong terminology. By "bond wire", I
> actually
> meant the connection between the output of the buffer on the die to the
> die
> pad. That's why I think that it should be included in the c_comp.
 
Yes, the "wiring" on the die should be part of c_comp.

> The effects of c_comp is already in the V/t waveform data. The on-die
> capacitance is what causes the ramp, right?
 
It is part of it, but not all. For example, capacitance in the pre-driver
stage may slow the edge rates of the waveforms at the gates of the output
transistors, causing the transistors to switch over a short time. Even if
you could make them have a purely resistive load (i.e., make c_comp = 0),
the output edges would not be instantaneous.

> So if a simulator is not
> careful enough, and uses the value of c_comp along with the V/t data in
> the
> IBIS model, then the c_comp would be "double-counted".
 
Any simulator that uses the V/T data, must be careful enough to use it
correctly!

Whatever algorithm it uses, it must be able to duplicate the V/T data, by
simulating the device connected to the same elements (R_fixture, etc.). If
it doesn't, the simulator's algorithm is wrong.

An explicit answer to your question is in the IBIS spec, in the section
about the V/T data: "All tables assume that the die capacitance is
included."

Both c_comp and the V/T data do include the effects of on-die capacitance,
but that doesn't mean it is being double-counted.
The V/T data includes the effects of many other parameters in the IBIS data
sheet, including the I/V data, the Voltage_Range, etc. But the V/T data
doesn't REPLACE those other parameters.

Think of the V/T data as just another "measurement" of your device which is
already specified by all the other parameters.

Andy

 
Received on Wed Dec 20 14:06:58 2000