Series MOSFET model

From: Stephen Nolan <s-nolan1@ti.com>
Date: Wed Jul 19 2000 - 06:30:22 PDT

IBIS experts, please help with another question. When making an IBIS model of a
FET switch, the IBIS spec calls for the following model:

| The model is:
|
| Table Current
| ------->
| + Vds -
| Pin 1 Pin 2
| <---| |---> +
| d |_____| - s
| --+-- Vgs Vs
| | g +
| -
|
| Vg = [Voltage Range] = Vcc
| Vgs = Table Voltage = Vtable = Vcc - Vs
| Ids = Table Current for a given Vcc and Vds

The table voltage that is reported is Vgs, the voltage difference between pin 2
(in this example) and the gate voltage (usually Vcc). This is an entirely
adequate model for n-FET only series switches, however several FET switch
devices use a full transmission-gate (n-FET in parallel with p-FET). When the
switch is enabled [On] the gate of the n-FET is usually at Vcc and the gate of
the p-FET is usually at ground.

        GND
         |
         o
       =====
      | | p-FET
    --| |--
    | |
----+-| |-+----
      |_____| n-FET
       --+--
         |
        Vcc

The question, obviously is "Which Vgs do I report in the table?"

-- 
Regards,
Stephen M. Nolan
Received on Wed Jul 19 06:33:05 2000

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