Hello all,
I am trying to run a tristate output driver that will drive into ttl
inputs on 5v IC's but can tolerate
a 0v to 5v output swing if it's output is pulled there. I did try using
voltage range, but didn't think
that would work since I wasn't sure how to get -5 to +10 for the clamps,
so I tried the pin mapping variable.
I can't seem to get the pin mapping syntax to work that allows me to
pull the output
from -5 to +10 for power clamp and ground clamp, while maintaining the
internal circuitry tied
to 3.3v. I do NOT have a pin tied to 5v going to my driver. When I go to
pin mapping, I also lose
my supply to vcc and gnd in the netlists. Maybe someone could send me
email as to
what else to try.
Thanks in advance, Dave Brand
Reply to dave.brand@honeywell.com
The input file below results in:
s2ibis2 v1.1 -- North Carolina State University
s2ibis2: Reading input file temp...done.
s2ibis2: Analyzing component TRI512_HX3000 .
s2ibis2: No POWER or GND pin associated with bus POWER_CLAMP.
The bus has been specified as a power or ground bus in the
[Pin Mapping] section of your input file, but it is not
connected to a pin with model name POWER or GND.
Here is what I tried:
[pullup reference] 3.3 2.97 3.63
[pulldown reference] 0 0 0
[power clamp reference] 5 4.5 5.5
[gnd clamp reference] 0 0 0
[Pin Mapping]
1 NC NC GND_CLAMP POWER_CLAMP
2 NC DRV_VDD
3 DRV_GND NC
4 DRV_GND DRV_VDD
5 DRV_GND DRV_VDD
[Pin]
1 20 PAD TRI512
-> 4 5
2 1 VCC POWER
3 0 GND GND
4 10 IN Input1 0 0 0
5 30 EN Enable1 0 0 0
[Model] TRI512
[Model type] 3-State
[Polarity] Non-Inverting
[Enable] Active-Low
[Model File] sm.soi5.nom sm.soi5.wc sm.soi5.bc
[sim time] 10.5n
[Rising waveform] 50 0 NA NA NA NA NA NA NA
[Rising waveform] 50 5 NA NA NA NA NA NA NA
[Falling waveform] 50 5 NA NA NA NA NA NA NA
[Falling waveform] 50 0 NA NA NA NA NA NA NA
[C_comp] 7.26pF 7.39pF 7.26pF
[Tr] .7ns 1ns .5ns
[Tf] .7ns 1ns .5ns
[Vmeas] 1.65V
[Model] Input1
[Model type] Input
[Polarity] Non-Inverting
[Model File] sm.soi5.nom sm.soi5.wc sm.soi5.bc
[Vinl] 0.0
[Vinh] 3.3
[Model] Enable1
[Model type] Input
[Polarity] Inverting
[Model File] sm.soi5.nom sm.soi5.wc sm.soi5.bc
[Vinl] 0.0
[Vinh] 3.3
Received on Mon Jul 24 19:42:02 2000
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