Re: Why no variable Vref in 3.2?

Michael:

BIRD66 has not been rejected. It is still pending for
an IBIS Version 4.0 release.

We have not had time yet to consider it and some implications
of conflicting definitions and applications of timing measurement,
and also some possiblity of additional extensions in this area
(e.g., separate loads for rising and falling edges.)

I expect that some full discussions to be conducted
in the next teleconference meeting and possibly on the
IBIS reflectors.

Best Regards,
Bob Ross
Mentor Graphics

"Mirmak, Michael" wrote:
>
> Fellow IBIS-fans,
>
> We are seeing increasing numbers of buffers which require, per their
> interface specifications, delay fixtures with variable reference voltages
> (the pullup/pulldown voltage "Vref," not the measurement voltage "Vmeas").
> A notable example is PCI, which has several recommended buffer delay
> fixtures for timings generation, each with a resistor pullup voltage which
> varies as the supply varies (in other words, with buffer corner).
>
> I have two questions related to variable Vref:
>
> 1) IBIS 3.2 only supports [Model Spec] variation of input thresholds,
> overshoots, pulse immunity and Vmeas; Vref cannot be varied using [Model
> Spec]. Short of using [Model Selector], is their any convenient way to
> specify Vref variation in an IBIS 3.2 model?
>
> 2) I believe that a BIRD was proposed some time ago which added Vref, as
> well as Cref and Rref, to the [Model Spec] keyword. The BIRD was not
> approved. What was the reasoning behind keeping Vref, Cref and Rref out of
> [Model Spec]?
>
> Thanks in advance!
>
> - Michael Mirmak
> Intel Corp.
> (916) 356-4261
> michael.mirmak@intel.com
Received on Mon Mar 20 14:02:31 2000