Re: DC convergence

Hi Linda.

This problem is very common. Your solution, however, is misguided.

I have the same problem with spice models from Fab we use.
I assume that the problem originated when the transistors were
extracted to spice the voltage range was lower than the Vdd IO.

However, I have solved it in two methods.

First, if you know some C you can try to changed the S2Ibis software
to work in the opposite direction. I mean you can modify the C to
generate
a put1.spi that has a DC sweep from 2*Vdd -> -Vdd.

The second solution, which work fine with a modified S2Ibis software,
is to set the voltage range to a limited Vdd like 2.5V instead of 3.3V.
While acutely connecting the Vdd generated by the S2Ibis file to a
dummy node. And setting Vdd to the true value.
To do this you must set VDDtyp=VDDmin=VDDmax in the voltage
range s2i file. Then you will have to change the result manually.
The change is the shifting of the pullup table voltage.
This method is very limited. And consumes a lot of man power.
But some times it you only solution.

For more ideas you are welcome to contact me.

> Hi,
> When DC sweep range from -Vcc to Vcc*2 on the PULLUP/PULLDOWN
> simulation, it has convergence problem. I try to use the alternative
> method is to do an AC, but the SPICE-IBIS convertor doesn't recognize
> the spice output format. So when it generated the IBIS model, it puts
> out N/A in the current table. Is there anyone can help me on this?
> thanks
> linda

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Dan Aleksandrowicz
Galileo Technology
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