RE: DC convergence

Not really. I have only seen non-convergence in this situation
when the buffer was clamping 1e+23 Amps of current at the end
of the IV curve. When the resistive properties of the clamps are
correctly described in the SPICE model, the endpoints will usually
not have more than a few amps. In that case I have never seen any
non-convergence problems, yet the device would probably still go
up in smoke...

Arpad Muranyi
Intel Corporation
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-----Original Message-----
From: Al Davis [mailto:aldavis@ieee.org]
Sent: Wednesday, September 06, 2000 12:03 PM
To: Linda Chu x3207; ibis-users@eda.org
Subject: Re: DC convergence

On Tue, 05 Sep 2000, Linda Chu x3207 wrote:
> When DC sweep range from -Vcc to Vcc*2 on the PULLUP/PULLDOWN
> simulation, it has convergence problem. ...

I think the real problem is that your real chip would probably go up
in smoke if you tried to force -Vcc or Vcc*2 into its signal pin,
without any series resistance to limit the current. Spice uses
non-convergence as a method of representing the smoke.

The best bet is to not sweep that far if it causes trouble, then fake
it by extending the slope in a straight line. Ideally, I would say
to stop the curves where you run out of data, but some simulators do
not extend the curve properly.

In any case, be sure test the resulting IBIS model, to make sure it
makes sense, and realize that you may need to tweak it a bit.

 
Received on Wed Sep 6 17:50:44 2000