usefullness of V/T curves

Hello IBIS users,

I just started trying to create an IBIS model for a CMOS 3-State output pad. I am not an expert on modelling or signal integrity, so I would greatly appreciate any help and feedback.

I have a question regarding the usefullness of an IBIS model:

In the IBIS Cookbook, it recommends that 4 V/T curves be generated for a standard CMOS buffer, using a 50 Ohm load connected to GND or Vcc. When using the IBIS model in HSPICE, there is an optional parameter that can be specified (ramp_rwf) to indicate that the [Rising waveform] and/or [Falling waveform] data is to be used instead of the [Ramp] ratio.

Specifying the [Rising waveform] and [Falling waveform] should provide better accuracy for the IBIS model because in reality the output switching of the device is not a linear ramp.

My confusion is, how is this data useful for the customer, when the load is not a 50 Ohm resistor, but, say capacitive? How can the data provided by the [Rising waveform] and [Falling waveform] in the IBIS model give accurate simulation results, when the loading on the device has been changed?

Thank you very much,

Betty Luk

IC Technology
Genesis Microchip Inc.
165 Commerce Valley Dr. W.
Thornhill, Ont. L3T 7V8
(905) 889-5400 x2256

 
Received on Tue Sep 19 14:28:34 2000