RE: built in termination

Chris,
This sounds like an HSpice problem. Many of the models I use have pull-up
terminators modeled in the power clamp. I see no reason why one couldn't
model a termination to ground in the ground clamp.

Aubrey Sparkman
Signal Integrity
Aubrey_Sparkman@Dell.com
(512) 723-3592

> -----Original Message-----
> From: Chris Burton [mailto:chris.burton@xanoptix.com]
> Sent: Tuesday, April 10, 2001 8:53 AM
> To: ibis-users@eda.org
> Subject: built in termination
>
>
>
> This might be a simple question, but I couldn't find it in any of the
> documentation...
>
> Can IBIS model an input with a build in termination?
>
> I created a model with the termination in the spice simulation (for
> s2ibis). The ibischk3 didn't report any problems with it. But when I
> simulated it in Hspice, first Hspice complained that the
> current wasn't
> 0 at gnd (for gnd clamp) and 0 at vdd (for power clamp). The
> resultant
> waveforms were the correct shape but offset from the proper voltage (I
> ran the transistor version of the input in the same circuit for
> comparison).
>
> I then removed the termination and recreated the ibis model. I
> resimulated with an external termination in Hspice (but connected
> directly to the input node) and everything matched fine.
>
>
> --
> Chris Burton Cad Support
> 603-546-0617 chris.burton@xanoptix.com
>