Hirut,
Here at Intel we came up with some clamping mechanisms
that reduce over/undershoot, consequently ringback by
bringing the knee voltage of the clamping device closer
to the rail voltage, or the signal levels. The problem
is that the knee of the I-V curves is never perfectly
sharp, there is some rounding. Due to this rounding one
can either not clamp well, or will have to put up with
some leakage during the steady state portions of the
signal. To reduce this DC current flow (and power
consumption), we came up with some clamping ideas where
the knee voltage is moved dynamically. Unfortunately
I can't tell you much more about this unless I let them
chop my head off, because there are some proprietary
ideas involved.
I hope this gives you some insight to what these dynamic
clamps are used for.
Arpad Muranyi
Intel Corporation
===========================================================
-----Original Message-----
From: Hirut Asfaw [mailto:hasf@us.ibm.com]
Sent: Wednesday, August 22, 2001 2:57 PM
To: ibis-users@eda.org
Subject:
Hi all,
Can anyone explain to me the real purpose of Dynamic Power/Gnd Clamp,
which is in addition to the Power/Gnd Clamp tables included in an IBIS
models.
Thanks,
Hirut
Hirut Asfaw
ASIC I/O Developement
IBM Microelectronics Division
External: (802) 769-0652 T/L: 6-0652
hasf@us.ibm.com
Received on Mon Aug 27 14:51:41 2001
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