Large diode currents

All,

I renamed the subject to reflect what we are talking about.

Aside from all that has been mentioned already, I would like
make another point. One side of the argument regarding the
necessity of extending the IV curves to -Vcc and 2*Vcc
says that a device will never see such high voltages, so
why bother...

This is probably the philosophy of those SPICE model
makers who do not care to put in the resistive properties
of those parasitic diodes. However, they fail to realize
one thing. These diodes "turn on" at about 0.6 volts outside
the rails. If there is no resistance included in the model,
such a diode can draw several tens of amps (if not more) very
easily at say one volt of forward bias.

Now, think about the signal integrity consequences of this.
It is not too hard to "design" a system that over or undershoots
one volt (or more) outside the rails. The amount of under
and overshoot, and consequently the resulting ringback will
greatly DEPEND on how these waveforms are clamped by the
parasitic diodes in the drivers AND(!) receivers.

A circuit designer usually doesn't think of this, and feels
that "there shall be no signals outside the rails". The SI
guy MUST fix his problems to avoid that. Unfortunately
real life is different, and under and overshoots will
happen whether we like it or not.

So the issue here is not so much whether the end point of
an IV curve in an IBIS model is at so many tera amps. The
problem revolves more around getting better information on
what the signals will look like when they go outside the
rail, and upon returning from being outside the rail. By
the way, this will also change the picture on Inter Symbol
Interference (ISI) effects, which DO directly effect the
timing of the edges also.

Arpad Muranyi
Intel Corporation
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Received on Fri Jan 12 11:03:13 2001