Hi,
I am modelling onchip termination for certain IO standards and unfortunately the [POWER_clamp] curve
puts out information from -VDD to 0v. The region of interest( termination effects) is 0v to +VDD. Is there a way to input information
( without modifying the source code of the simulator ) such that the IBIS file spits out -VDD to +VDD in the
[POWER_clamp] curve. By the way, the termination is modelled as a split termination ie 50 Ohms to VDD and
50 Ohms to GND. These are not passive devices but active( transistors) devices.
Thanks in advance,
Regards,
Prasad Rau
Xilinx
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