Re: Question regarding the [POWER_clamp] curve

Bob,

I found out that Prasad's issue is indeed how to get s2ibis2
to produce an IBIS file where drivers with internal termination.
My proposed workaround is run s2ibis2 twice, once with model type
Terminator, and steal the clamp curves to use in the other IBIS
file. But I tried it and found that s2ibis2 seems to double count
the resistance, because it appears in both the POWER_clamp and
GND_clamp curves. Does it seem reasonable to steal only one of
the curves from the Terminator run to include in the IBIS file?

Mike

P.S. I find that the Nasef presentation contains unresolved
     references to image files.

Bob Ross wrote:
>
> Prasad:
>
> To add to Mike LaBonte's response, it is permissible
> to extend both [Gnd Clamp] and [Power Clamp] tables over
> the full -vdd to 2*Vdd range. For internal terminators,
> this would be a good idea.
>
> If you have ideal 50 ohm resistors to Gnd and also to
> Vdd, the [Gnd Clamp] and [Power Clamp] tables might
> look like this for Vdd = 3.3 V:
>
> [Gnd Clamp]
> -3.3 -66ma -66ma -66ma
> 0 0 0 0
> 6.6 132ma 132ma 132ma
>
> [Power Clamp]
> -3.3 66ma 66ma 66ma
> 0 0 0 0
> 6.6 -132ma -132ma -132ma
>
> For your active devices, you would need to find a
> method to extract the actual (transistor) table
> information and to properly decompose the extracted
> information into the two tables.
>
> A presentation that proposes improvements to
> s2ibis2 for internal termination situations was
> given under:
>
> http://www.eda.org/pub/ibis/summits/oct99/nasef.zip
>
> Bob Ross
> Mentor Graphics
>
> > Prasad Rau wrote:
> >
> > Hi,
> >
> > I am modelling onchip termination for certain IO standards and unfortunately
> > the [POWER_clamp] curve
> > puts out information from -VDD to 0v. The region of interest( termination
> > effects) is 0v to +VDD. Is there a way to input information
> >
> > ( without modifying the source code of the simulator ) such that the IBIS file
> > spits out -VDD to +VDD in the
> > [POWER_clamp] curve. By the way, the termination is modelled as a split
> > termination ie 50 Ohms to VDD and
> > 50 Ohms to GND. These are not passive devices but active( transistors)
> > devices.
> >
> > Thanks in advance,
> >
> > Regards,
> >
> > Prasad Rau
> > Xilinx
> >
> >
 
Received on Wed Jul 11 16:35:02 2001