Re: How to determine per length RLC in a board

Scott,

I think you may want to re-read my reply to Yaping. He had the balanced
stripline case covered, although I agree with everything you say.

My reply was meant to address his *other* stackup, SIG-GND-PWR. In that
case, he SIG layer is NOT between the planes. If the SIG is only
adjacent to the GND, and the PWR is on ther other side of the GND plane
from the SIG, the GND will be the dominant return path for the higher
frequency components, unless poor decoupling prevents the current from
reaching GND.

Not wanting to argue with Maxwell (I'm under-armed) but I doubt it's
worth trying to figure out the current/frequency component of the return
current in the PWR plane in that case.

Alan

Scott McMorrow wrote:
>
> All,
>
> Huh?
>
> "Return path" as it is applied to AC Impedance, is the
> instantaneous path that the fields take in traveling between multiple
> conductors.
>
> For balanced stripline, PWR-SIG-GND, the fields most absolutely
> do propagate between the signal and both the power and ground
> planes. The field equally divides between the two. As a result,
> the high speed currents will use both planes. Even a floating
> conductor will "capture" fields and carry a "return current".
> The fields don't know to stop until they reach a metalic object.
> This follows from Maxwell's first Law.
>
> The RLC characteristic of a stripline trace (with the same dimensions)
> between two ground planes, two power planes, one power and one ground
> plane are identical. They are also identical for floating metal once
> the fields are established.
>
> The only difference in all of these configurations is in the "transition
> region" to get onto the structure. Here things get interesting. However,
> IBIS ebd models, and most of the Intel literature do not concern
> themselves with modeling these effects, anyway.
>
> regards,
>
> scott
>
> --
> Scott McMorrow
> Principal Engineer
> SiQual, Signal Quality Engineering
> 18735 SW Boones Ferry Road
> Tualatin, OR 97062-3090
> (503) 885-1231
> http://www.siqual.com
>
> Alan Hilton-Nickel wrote:
>
> > Yaping,
> >
> > In the SIG-GND-PWR, the PWR plane is not a return path for the signal
> > layer. I suggest you model it as SIG-GND (microstrip). The high-speed
> > currents will always use the GND plane, assuming good decoupling between
> > PWR and GND.
> >
> > Alan
> >
> > Yaping Zhou wrote:
> > >
> > > Hi, All:
> > >
> > > If the stackup in a board is a symmetric stripline structure (GND-SIG-PWR),
> > > the characteristic impedance is the same for switching high and low, and the
> > > per length RLC are also the same for both switching cases.
> > >
> > > How to determine the per length RLC in a board with a stackup like
> > > SIG-GND-PWR? The characteristic impedance and per length RLC are
> > > switching-dependent, but there is no way to put two values for each trace in
> > > an ebd file.
> > >
> > > Intel uses ebd to describe packages used for Pentium processors,I have the
> > > same question there on the way to determine RLC values.
> > >
> > > Your help is appreciated.
> > >
> > > Thanks,
> > >
> > > --
> > > **************************************
> > > Yaping Zhou (r3aadv)
> > > (512) 933-5803
> > > Motorola Semiconductor Products Sector
> > > Final Manufacturing Technology Center
> > > Ed Bluestein, Austin, Texas
> > > **************************************
 
Received on Tue Jun 5 11:33:08 2001