Subject: [IBIS-Users] input termination
From: erik.van.der.ven@philips.com
Date: Fri Oct 03 2003 - 02:51:20 PDT
Hello IBIS experts,
I have to model an LVDS input with internal termination.
What is the best way to model this internal circuitry?
What are the alternatives?
And are the above implementations suitable for most IBIS simulators?
In an input model Vinl and Vinh can be specified. This does not apply to
my case since the absolute values are not of impotance, only the
differential voltage matters. Is it enough to specify Vdiff in the [diff
pin] keyword? Will Vinl and Vinh be ignored then? (since they also have
default values normally).
With kind regards,
Erik.
Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334
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